Contents
6.1.32 Bank 2 RC (ADDATA1H: Converted Value of ADC )..........................................23
6.1.33 Bank 2 RD (ADDATA1L: Converted Value of ADC ) ..........................................23
6.1.34 Bank 2 RE (LVDC: LVD Control Register ).........................................................24
6.1.35 Bank 2 RF (TMR3H: Most Significant Bits of PWM3 Timer) ..............................24
6.1.36 Bank 3 R5 (Pull-low Control Register 1).............................................................24
6.1.37 Bank 3 R6 (Pull-low Control Register 2).............................................................25
6.1.38 Bank 3 R7 (Pull-low Control Register 3).............................................................25
6.1.39 Bank 3 R8 (Pull-low Control Register 4).............................................................26
6.1.40 Bank 3 R9 (Pull-high Control Register 1) ...........................................................26
6.1.41 Bank 3 RA (Pull-high Control Register 2)..........................................................26
6.1.42 Bank 3 RB (Pull-high Control Register 3)...........................................................27
6.1.43 Bank 3 RC (Pull-high Control Register 4)...........................................................27
6.1.44 Bank 3 RD (TMR1H: Most Significant Bits of PWM1 Timer).............................28
6.1.45 Bank 3 RE (TMR2H: Most Significant Bits of PWM2 Timer).............................28
6.1.46 Bank 3 RF (TMRL: Least Significant Bits of PWM Timer).................................28
6.2 Special Purpose Registers .............................................................................. 28
6.2.1 A (Accumulator).................................................................................................28
6.2.2 CONT (Control Register)...................................................................................28
6.2.3 IOC5 ~ IOC8 (I/O Port Control Register) ..........................................................29
6.2.4 IOC9 (T4CON: Timer 4 Control Register).........................................................29
6.2.5 IOCA (TCMPCON: Comparator Control Register)............................................30
6.2.6 IOCE (WDT Control Register)...........................................................................30
6.2.7 IOCF (Interrupt Mask Register).........................................................................32
6.3 TCC/WDT and Prescaler.................................................................................. 33
6.4 I/O Ports ........................................................................................................... 34
6.4.1 Usage of Port 6 Input Change Wake-up/Interrupt Function..............................37
6.5 Serial Peripheral Interface Mode...................................................................... 37
6.5.1 Overview and Features.....................................................................................37
6.5.2 SPI Function Description..................................................................................39
6.5.3 SPI Signal and Pin Description .........................................................................41
6.5.4 Programming the Related Registers.................................................................42
6.5.5 SPI Mode Timing...............................................................................................45
6.5.6 SPI Software Application...................................................................................46
6.6 Timer 4 ............................................................................................................. 48
6.6.1 Overview ...........................................................................................................48
6.6.2 Function Description..........................................................................................48
6.6.3 Programming the Related Registers.................................................................49
6.7 Reset and Wake-up.......................................................................................... 50
6.7.1 Reset and Wake-up Operation..........................................................................50
6.7.1.1 Wake-up and Interrupt Mode Operation Summary.............................53
6.7.1.2 Register Initial Values after Reset.......................................................55
6.7.1.3 Controller Reset Block Diagram .........................................................62
6.7.2 The T and P Status under Status Register........................................................63
iv•
Product Specification (V1.0) 09.14.2006