EM78P257
OTP ROM
* RC type: clock output with a duration of one instruction cycle.
* External clock signal input.
I/O * General purpose I/O pin. (P71 is input pin only)
* Default value after a power on reset.
I/O * General purpose I/O pin.
P70,P71
P60~P67
16,5
7~14
* Open_drain.
* Default value after a power on reset.
P50~P57
1~4
I/O * General purpose I/O pin.
17~20
* Pull_high/pull_down.
* Wake up from sleep mode when the status of the pin changes.
* Default value after a power on reset.
IR OUT
14
O
* IR mode output pin, capable of sinking 20mA
/INT
7
I
I
I
I
I
O
O
I
* External interrupt pin triggered by falling edge.
* “ -“ -> the input pin of Vin- of a comparator.
* “ +” -> the input pin of Vin+ of a comparator.
* Pin CO1~4 are the outputs of the comparators.
CIN1-, CIN1+
CIN2-, CIN2+
CIN3-, CIN3+
CIN4-, CIN4+
CO1,CO2
CO3,CO4
TCC
17,18
4,3
8,9
13,12
19,2
10,11
4
External Counter input.
TCC1,TCC2
TCC3,TCC4
TCC5,TCC6
/RESET
8,13
19,18
1,20
5
I
* If set as /RESET and remains at logic low, the device will be reset.
* Voltage on /RESET/Vpp must not exceed Vdd during the normal
mode.
* Pull_high is on if defined as /RESET.
VSS
6
-
Ground.
This specification is subject to change without prior notice.
9
07.27.2004 (V1.4)
ELAN [ ELAN MICROELECTRONICS CORP ]
