EM78871
8-bit Micro-controller
User Application Note
1. ROM, OTP, ICE
ROM
OTP
ICE
EM78871
EM78P808
ICE 808
2. The difference between ICE 808 , EM78P808 and EM78871 are listed in the table
ICE 808
EM78P808
EM78871
Comparator reference voltage VDD
VDD or 2V
VDD or 2V
Stack pointer
Data Rom
O
O
O
O
X
X
(R6 page1 bit0-7&R7 page1
bit0- 7&R8 page1 bit0-7& R9 page1
bit0-1 unused)
RE page1 bit4
IOCE page1 bit0-1
O
O
O
O
X(unused)
X(unused)
RE page1 bit7-6
O
O
X(unused)
IOCE page2 bit0-2, bit4-6
code option bit0
3. "While switching main clock (regardless of high freq to low freq or on the other hand), adding 6
instructions delay (NOP) is required."
4. For DATA RAM least address(A0~A7), when using “INC” instruction and overflow occur,
the middle address will auto_increase. If using “DEC” instruction and least address from
0x00ꢀ0xFF, the middle address can’t auto_decrease.
5. When Tip and Ring signals come, user cans choice one of FSK or DTMF receiver to decode.
The Operation Registers Setup as follows:
FSK
DTMF
FSK or DTMF
(RA PAGE0 bit 3)
(IOC9 PAGE1 bit 7)
0
0
0
1
All decoder off
DTMF on
FSK off
1
X
FSK on
(don’t care)
DTMF off
6.Die Pin difference
EM78P808
EM78871
Pin
136 pins
132 pins
EGIN1
EGIN2
Power PAD
Gnd PAD
V
V
X
X
2(VDD pin & AVDD pin) 1(VDD/AVDD pin)
2(AVSS pin & GND pin) 1(AVSS/GND pin)
7.Don’t switch to sleep mode from normal mode directly. Before do this, please
switch to green mode first.
8.Don’t allow enable Idle Mode Function. (RA Page0 bit 7 don’t allow set to 1)
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* This specification is subject to be changed without notice.
3
8/23/04 (V1.5)
ELAN [ ELAN MICROELECTRONICS CORP ]
