EM78860
8-BIT MICRO-CONTROLLER
RB
Empty register, please don't use.
RC(2.5k RAM address)(read/write)
7
6
5
4
3
2
1
0
CIDA7 CIDA6
CIDA5
CIDA4
CIDA3
CIDA2
CIDA1 CIDA0
• Bit 0 ~ Bit 7 select CALLER ID RAM address up to 256.
RD(2.5k RAM address)(read/write)
• Bit 0 ~ Bit 8 are CALLER ID RAM data transfer register.
User can see IOCA register how to select CID RAM banks.
RE(LCD Driver,WDT Control)(read/write)
7
-
6
5
4
3
2
1
0
/WDTE /WUP9H /WUP9L /WURING LCD_C2 LCD_1 LCD_M
• Bit0 (LCD_M):LCD_M decides the methods, including duty, bias, and frame frequency.
• Bit1~Bit2 (LCD_C#):LCD_C# decides the LCD display enable or blanking. change the display duty must
set the “LCD_C2,LCD_C1” to “00”.
LCD_C2,LCD_C1
LCD Display Control
Change duty
Disable(turn off LCD)
Blanking
LCD_M
duty
1/16
1/8
:
bias
1/4
1/4
0
0
0
1
:
0
1
1
1
LCD display enable
:
:
• Bit3 unused. Please set to "0"
• Bit4(/WUP9L, PORT9 low nibble Wake Up Enable) : used to enable the wake-up function of low nibble in
PORT9, (1/0=enable/disable)
• Bit5 (/WUP9H, PORT9 high nibble WAKE Up Enable) : used to enable the wake-up function of high
nibble in PORT9, (1/0=enable/disable)
• Bit6 (/WDTE, Watch Dog Timer Enable)
Control bit used to enable Watchdog timer. (1/0=enable/disable)
• Bit7 unused
RF (Interrupt Status Register)
7
6
-
5
4
3
2
1
0
INT3
C8_2
C8_1
INT2
INT1
INT0
TCIF
• “1” means interrupt request, “0” means non-interrupt
• Bit 0 (TCIF) TCC timer overflow interrupt flag. Set when TCC timer overflows .
• Bit 1 (INT0) external INT0 pin interrupt flag .
• Bit 2 (INT1) external INT1 pin interrupt flag .
• Bit 3 (INT2) external INT2 pin interrupt flag .
• Bit 4 (C8_1) internal 8 bit counter interrupt flag .
• Bit 5 (C8_2) internal 8 bit counter interrupt flag .
* This specification are subject to be changed without notice.
8
6.24.1998