EM785830AD
8-bit Micro-controller
VI. Pin Descriptions
PIN
I/O
DESCRIPTION
POWER
AVDD
AVSS
CLOCK
XIN
POWER
POWER
Power
Ground
I
Input pin for 32.768 kHz oscillator
Output pin for 32.768 kHz oscillator
XOUT
PLLC
LCD
O
I
Phase loop lock capacitor, connect a capacitor 0.047u to 0.1u to the ground.
COM0 ~ COM3 O
SEG0 ~ SEG1
Common driver pins of LCD drivers
Segment driver pins of LCD drivers
O
SEG10 ~ SEG12 O (I/O : PORT5) SEG10 to SEG20 are shared with IO PORT.
SEG13 ~ SEG20 O (I/O : PORT9)
6 channel 10-bit A/D
AD1
AD2
AD3
AD4
AD5
AD6
ADR
I (P60)
I (P61)
I (P62)
I (P63)
I (P64)
I (P65)
I (P66)
ADC input channel 1. Shared with PORT60
ADC input channel 2. Shared with PORT61
ADC input channel 3. Shared with PORT62
ADC input channel 4. Shared with PORT63
ADC input channel 1. Shared with PORT64
ADC input channel 2. Shared with PORT65
ADC external reference input. Shared with PORT66
SPI
SCK
SDO
SDI
IO (PORT76)
O (PORT75)
I (PORT74)
Master: output pin, Slave: input pin. This pin shared with PORT76.
Output pin for serial data transferring. This pin shared with PORT75.
Input pin for receiving data. This pin shared with PORT74.
PWM
PWM1
PWM2
IO
O (PC1)
O (PC2)
Pulse width modulation output channel 1. This pin is shared with PC1
Pulse width modulation output channel 2. The pin is shared with PC2
P55~P57
I/O
PORT5 can be INPUT or OUTPUT port each bit.
PORT5(7:5) are shared with LCD Segment signal.
PORT6 can be INPUT or OUTPUT port each bit.
PORT7 can be INPUT or OUTPUT port each bit.
PORT7(4~6) are shared with SPI interface pins
Internal Pull high function.
P60 ~P67
P70 ~ P77
I/O
I/O
PORT7(0~3) has interrupt function.
P80
I/O
I/O
P80 can be INPUT or OUTPUT port each bit.
Internal pull high.
PORT80 have wake-up functions(set by RE PAGE0)
PORT9 can be INPUT or OUTPUT port each bit.
PORT90~93 are shared with ADC input.
P90 ~ P97
PORT9 are shared with LCD Segment signal.
PORTC can be INPUT or OUTPUT port each bit.
PORTC(1~2) are shared with PWM output pins
Interrupt sources. Once PORT70 has a falling edge or rising edge signal
PC0 ~ PC3
INT0
I/O
(PORT70)
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* This specification is subject to be changed without notice.
5
12/14/2004 (V1.4)