Contents
Contents
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GENERAL DESCRIPTION................................................................................................... 1
FEATURES........................................................................................................................... 1
PIN ASSIGNMENT ...............................................................................................................3
3.1 EM78458 Pin Description.............................................................................................3
3.2 EM78459 Pin Description.............................................................................................4
FUNCTION DESCRIPTION.................................................................................................. 5
4
4.1 Operational Registers ..................................................................................................5
4.1.1 R0 (Indirect Addressing Register) .................................................................................5
4.1.2 R1 (Time Clock /Counter)..............................................................................................5
4.1.3 R2 (Program Counter) & Stack......................................................................................5
4.1.4 R3 (Status Register) ......................................................................................................7
4.1.5 R4 (RAM Select Register).............................................................................................7
4.1.6 R5 ~ R6 (Port 5 ~ Port 6)...............................................................................................7
4.1.7 R7 ~ R8 .........................................................................................................................7
4.1.8 R9 (ADCON: Analog to Digital Control).........................................................................9
4.1.9 RA (ADDATA: the converted value of ADC) ..................................................................9
4.1.10 RB..................................................................................................................................9
4.1.11 RC................................................................................................................................10
4.1.12 RD................................................................................................................................10
4.1.13 RE................................................................................................................................10
4.1.14 RF (Interrupt Status Register) .....................................................................................10
4.2.15 R10 ~ R3F ...................................................................................................................10
4.2 Special Purpose Registers......................................................................................... 11
4.2.1 A (Accumulator)...........................................................................................................11
4.2.2 CONT (Control Register).............................................................................................11
4.2.3 IOC50 ~ IOC60 (I/O Port Control Register).................................................................12
4.2.4 IOC90 (GCON: I/O Configuration & Control of ADC ).................................................12
4.2.5 IOCA0 ( AD-CMPCON ) .............................................................................................13
4.2.6 IOCB0 (Pull-down Control Register) ...........................................................................14
4.2.7 IOCC0 (Open-Drain Control Register) ........................................................................14
4.2.8 IOCD0 (Pull-high Control Register).............................................................................15
4.2.9 IOCE0 (WDT Control Register)...................................................................................15
4.2.10 IOCF0 (Interrupt Mask Register).................................................................................16
4.2.11 IOC51 ( PWMCON )....................................................................................................17
4.2.12 IOC61 ( DT1L: the Least Significant Byte
( Bit 7 ~ Bit 0) of Duty Cycle of PWM1 ).....................................................................17
4.2.13 IOC71 ( DT1H: the Most Significant Byte
( Bit 1 ~ Bit 0 ) of Duty Cycle of PWM1 )....................................................................18
4.2.14 IOC81 ( PRD1: Period of PWM1 )...............................................................................18
4.2.15 IOC91 ( DT2L: the Least Significant Byte
( Bit 7 ~ Bit 0 ) of Duty Cycle of PWM2 )..................................................................18
Product Specification (V1.4) 05.27.2005
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