EM78452
8-Bit Microcontroller
5 Function Description
WDT Timer
P C
STACK 1
STACK 2
STACK 3
STACK 4
STACK 5
WDT
Prescaler
Time-out
Oscillator/
Timming
Control
/INT
ROM
Interrupt
Control
Instruction
Register
R1(TCC)
ALU
Instruction
Decoder
Sleep
&
RAM
R3
ACC
Wake Up
Control
R4
TMR1
DATA & CONTROL BUS
IOC5
R5
IOC6
R6
IOC7
R7
IOC9
R9
IOC8
R8
SPI
ENGIN
P P P
PPPPPPPP
5 5 5 5 5 5 5 5
0 1 2 3 4 5 6 7
PPPPPPPP
6 6 6 6 6 6 6 6
0 1 2 3 4 5 6 7
P
7
0
P
7
1
P
7
2
PPPPPPPP
8 8 8 8 8 8 8 8
0 1 2 3 4 5 6 7
P P
P
5
5
/
9
2
/
9
3
/
9
4
/
9
9
0 1
/
S
D
O
S
D
I
S
C
K
S
/
S
S
R
D
Y
Fig. 5-1 Functional Block Diagram
5.1 Operational Registers
5.1.1 R0 (Indirect Address Register)
R0 is not a physically implemented register. It is used as an indirect addressing
pointer. Any instruction using R0 as register actually accesses data pointed by the
RAM Select Register (R4).
5.1.2 R1 (TCC)
R1 is incremented by the instruction cycle clock.
It is written and read by the program as any other register.
5.1.3 R2 (Program Counter) & Stack
R2 and the hardware stacks are 12 bits wide.
The structure is depicted in Fig. 5-2.
Generates 4K × 13 on-chip ROM addresses to the relative programming instruction
codes. One program page is 1024 words long.
All the R2 bits are set to "1"s as a reset condition occurs.
4 •
Product Specification (V1.0) 10.18.2007
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
