EBJ41HE4BDFD, EBJ41HE4BDFM, EBJ41HE4BDFP
Serial PD Matrix
-AE
Hex
-DJ
Byte No.
0
Function described
Comments
Hex
Comments
Number of serial PD bytes written/SPD device
size/CRC coverage
92h
176/256/0-116
92h
176/256/0-116
1
SPD revision
10h
0Bh
01h
02h
12h
00h
08h
0Bh
52h
01h
08h
0Fh
00h
1Ch
00h
Rev.1.0
10h
0Bh
01h
02h
12h
00h
08h
0Bh
52h
01h
08h
0Ch
00h
3Ch
00h
69h
78h
69h
Rev.1.0
2
Key byte/DRAM device type
Key byte/module type
DDR3 SDRAM
DDR3 SDRAM
3
RDIMM
RDIMM
4
SDRAM density and banks
SDRAM addressing
1G bits, 8 banks
1G bits, 8 banks
5
14 rows, 11 columns
14 rows, 11 columns
6
Module nominal voltage, VDD
Module organization
1.5V
1.5V
7
2 ranks/×4 bits
2 ranks/×4 bits
8
Module memory bus width
Fine timebase (FTB) dividend/divisor
Medium timebase (MTB) dividend
Medium timebase (MTB) divisor
SDRAM minimum cycle time (tCK (min.))
Reserved
72 bits/ECC
72 bits/ECC
9
5/2
5/2
10
11
12
13
14
15
16
17
18
1
1
8
8
1.875ns
—
1.5ns
—
SDRAM /CAS latencies supported, LSB
SDRAM /CAS latencies supported, MSB
6, 7, 8
—
6, 7, 8, 9
—
SDRAM minimum /CAS latencies time (tAA (min.)) 69h
13.125ns
15ns
13.125ns
13.125ns
15ns
SDRAM write recovery time (tWR)
78h
69h
SDRAM minimum /RAS to /CAS delay (tRCD)
13.125ns
SDRAM minimum row active to row active
delay (tRRD)
19
3Ch
7.5ns
30h
6.0ns
20
21
SDRAM minimum row precharge time (tRP)
SDRAM upper nibbles for tRAS and tRC
69h
11h
13.125ns
—
69h
11h
13.125ns
—
SDRAM minimum active to precharge time
(tRAS), LSB
SDRAM minimum active to active /auto-refresh time
(tRC), LSB
SDRAM minimum refresh recovery time delay
(tRFC), LSB
SDRAM minimum refresh recovery time delay
(tRFC), MSB
SDRAM minimum internal write to read
command delay (tWTR)
SDRAM minimum internal read to precharge
command delay (tRTP)
22
23
24
25
26
27
2Ch
95h
70h
03h
3Ch
3Ch
37.5ns
50.625ns
110ns
110ns
7.5ns
20h
89h
70h
03h
3Ch
3Ch
36ns
49.125ns
110ns
110ns
7.5ns
7.5ns
7.5ns
28
29
30
Upper nibble for tFAW
01h
2Ch
83h
37.5ns
00h
F0h
83h
30ns
Minimum four activate window delay time (tFAW)
SDRAM output drivers supported
37.5ns
30ns
DLL-off, RZQ/6, 7
DLL-off, RZQ/6, 7
PASR/2X refresh at
+85ºC to +95ºC
PASR/2X refresh at
+85ºC to +95ºC
31
SDRAM refresh options
81h
81h
32
Module thermal sensor
SDRAM device type
Reserved
80h
00h
00h
Incorporated
Standard
—
80h
00h
00h
Incorporated
Standard
—
33
34 to 59
Data Sheet E1580E30 (Ver. 3.0)
6
ELPIDA [ ELPIDA MEMORY ]
