EBJ40UG8BBU0
Serial PD Matrix
-DJ
-GN
Byte No. Function described
Hex
Comments
Hex
92h
Comments
Number of serial PD bytes written/
0
92h
176/256/0-116
176/256/0-116
SPD device size/CRC coverage
1
SPD revision
10h
0Bh
03h
04h
21h
00h
01h
03h
52h
01h
08h
0Ch
00h
7Eh
00h
69h
Rev.1.0
10h
0Bh
03h
04h
21h
00h
01h
03h
52h
01h
08h
0Ah
00h
FEh
00h
69h
78h
69h
Rev.1.0
2
Key byte/DRAM device type
Key byte/module type
DDR3 SDRAM
DDR3 SDRAM
3
SO-DIMM
SO-DIMM
4
SDRAM density and banks
4G bits, 8 banks
4G bits, 8 banks
5
SDRAM addressing
16 rows, 10 columns
16 rows, 10 columns
6
Module nominal voltage, VDD
Module organization
1.5V
1.5V
7
1 rank/×8 bits
1 rank/×8 bits
8
Module memory bus width
64 bits/non-ECC
64 bits/non-ECC
9
Fine timebase (FTB) dividend/divisor
Medium timebase (MTB) dividend
Medium timebase (MTB) divisor
SDRAM minimum cycle time (tCK (min.))
Reserved
5/2
5/2
10
11
12
13
14
15
16
17
18
1
1
8
8
1.5ns
1.25ns
—
—
SDRAM CAS latencies supported, LSB
SDRAM CAS latencies supported, MSB
SDRAM minimum CAS latencies time (tAA (min.))
5, 6, 7, 8, 9, 10
—
5, 6, 7, 8, 9, 10, 11
—
13.125ns
15ns
13.125ns
15ns
SDRAM minimum write recovery time (tWR (min.)) 78h
SDRAM minimum /RAS to /CAS delay (tRCD (min.)) 69h
13.125ns
13.125ns
SDRAM minimum row active to row active delay
(tRRD (min.))
19
30h
6ns
30h
6ns
20
21
SDRAM minimum row precharge time (tRP (min.))
SDRAM upper nibbles for tRAS and tRC
69h
11h
13.125ns
—
69h
11h
13.125ns
—
SDRAM minimum active to precharge time
(tRAS (min.)), LSB
22
23
24
25
26
20h
89h
20h
08h
3Ch
36ns
18h
81h
20h
08h
3Ch
35ns
SDRAM minimum active to active /auto-refresh time
(tRC (min.)), LSB
49.125ns
260ns
260ns
7.5ns
48.125ns
260ns
260ns
7.5ns
SDRAM minimum refresh recovery time delay
(tRFC (min.)), LSB
SDRAM minimum refresh recovery time delay
(tRFC (min.)), MSB
SDRAM minimum internal write to read
command delay (tWTR (min.))
SDRAM minimum internal read to precharge
command delay (tRTP (min.))
27
28
29
30
31
3Ch
00h
F0h
83h
81h
7.5ns
3Ch
00h
F0h
83h
81h
7.5ns
Upper nibble for tFAW
30ns
30ns
Minimum four activate window delay time
(tFAW (min.))
30ns
30ns
SDRAM optional features
DLL-off, RZQ/6, 7
DLL-off, RZQ/6, 7
PASR/2X refresh at
+85ºC to +95ºC
PASR/2X refresh at
+85ºC to +95ºC
SDRAM thermal and refresh options
32
33
Module thermal sensor
SDRAM device type
00h
00h
Not incorporated
Standard
00h
00h
Not incorporated
Standard
Data Sheet E1833E20 (Ver. 2.0)
5
ELPIDA [ ELPIDA MEMORY ]
