EBE51RD8AGFA
Block Diagram
/RCS0
R
S
R
S
/DQS4
DQS4
/DQS0
DQS0
R
S
R
S
R
S
R
NU/
S
/CS DQS /DQS
NU/
/CS DQS /DQS
/DQS13
/RDQS
/DQS9
/RDQS
R
S
S
R
DM,
RDQS
S
S
DM/
RDQS
DM4/DQS13
DM0/DQS9
D4
D0
8
R
8
DQ0
to DQ7
R
DQ0
to DQ7
DQ32 to DQ39
/DQS5
DQ0 to DQ7
/DQS1
R
R
S
R
R
S
S
S
DQS5
/DQS14
DQS1
/DQS10
R
S
R
S
NU/
/RDQS
DM/
/RDQS
/CS DQS /DQS
NU/
/RDQS
DM/
RDQS
/CS DQS /DQS
R
R
S
R
R
S
DM5/DQS14
DQ40 to DQ47
D5
DM0/DQS10
DQ8 to DQ15
D1
8
S
8
S
DQ0
to DQ7
DQ0
to DQ7
R
S
R
S
/DQS6
DQS6
/DQS2
DQS2
R
S
R
S
R
S
R
NU/
S
/CSDQS /DQS
NU/
/CS DQS /DQS
/DQS15
/RDQS
/DQS11
/RDQS
R
S
R
S
DM/
/RDQS
DM/
RDQS
DM0/DQS15
DM2/DQS11
D6
D2
8
R
S
8
DQ0
to DQ7
R
S1
DQ0
to DQ7
DQ48 to DQ55
/DQS7
DQ16 to DQ23
/DQS3
R
R
S
R
R
S
S
S
DQS7
/DQS16
DQS3
/DQS12
R
S
R
S
NU/
/RDQS
DM/
/RDQS
/CSDQS /DQS
NU/
/RDQS
DM/
RDQS
/CS DQS /DQS
R
R
S
R
R
S
DM0/DQS16
DQ56 to DQ63
D7
DM3/DQS12
DQ24 to DQ31
D3
8
S
8
S
DQ0
to DQ7
DQ0
to DQ7
R
S
/DQS8
R
S
DQS8
/DQS17
R
S
NU/
VDDSPD
Serial PD
D0 to D8
/CS DQS /DQS
Serial PD
/RDQS
VDD
R
R
S
DM/
/RDQS
SCL
SDA
SCL
SDA
DM0/DQS17
CB0 to CB7
D8
D0 to D8
D0 to D8
VREF
VSS
8
S
U0
DQ0
to DQ7
A1 A2
WP A0
D0 to D8: 512M bits DDR2 SDRAM
U0: 2k bits EEPROM
RS: 22Ω
PLL: CUA877
Register: SSTUA32866
SA0 SA1
SA2
R
S
2
/CS0*
/RCS0 -> /CS: SDRAMs D0 to D8
R
E
G
I
S
T
E
R
R
S
R
S
R
S
BA0 to BA1
A0 to A13
/RAS
RBA0 to RBA1 -> BA0 to BA1: SDRAMs D0 to D8
RA0 to RA13 -> A0 to A13: SDRAMs D0 to D8
/RRAS -> /RAS: SDRAMs D0 to D8
/RCAS -> /CAS: SDRAMs D0 to D8
RCKE0 -> CKE: SDRAMs D0 to D8
/RWE -> /WE: SDRAMs D0 to D8
Notes:
1. DQ wiring may be changed within a byte.
2. /CS0 connects to D/CS and VDD connects to /CSR on register.
R
S
R
S
R
S
R
S
/CAS
CKE0
/WE
ODT0
RODT0 -> ODT0: SDRAMs D0 to D8
/RST
/RESET
PCK7
/PCK7
P
L
L
PCK0 to PCK6, PCK8, PCK9 -> CK: SDRAMs D0 to D8
/PCK0 to /PCK6, /PCK8, /PCK9 -> /CK: SDRAMs D0 to D8
CK0
/CK0
PCK7 -> CK: register
/PCK7 -> /CK: register
/RESET
OE
Data Sheet E0793E20 (Ver. 2.0)
8
ELPIDA [ ELPIDA MEMORY ]
