EBE41UF8ABDA
Serial PD Matrix
Byte No. Function described
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value Comments
Number of bytes utilized by module
manufacturer
0
1
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
80H
08H
128 bytes
256 bytes
Total number of bytes in serial PD
device
2
3
4
5
6
7
Memory type
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
0
0
0
0
0
1
0
0
1
1
1
0
0
0
0
1
0
0
0
0
0
1
1
0
0
0
0
1
0
1
0
0
08H
0FH
0AH
71H
40H
00H
DDR2 SDRAM
Number of row address
Number of column address
Number of DIMM ranks
Module data width
15
10
Stack/2ranks
64
0
Module data width continuation
Voltage interface level of this
assembly
8
9
0
0
0
0
0
1
0
1
05H
SSTL 1.8V
DDR SDRAM cycle time, CL = X
-8G (CL = 6)
0
0
0
0
0
1
1
1
0
0
1
0
0
0
0
1
0
0
0
0
0
1
0
0
25H
30H
40H
2.5ns*1
3.0ns*1
0.4ns*1
-6E (CL = 5)
SDRAM access from clock (tAC)
-8G
10
-6E
0
0
1
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0
0
45H
00H
82H
08H
00H
00H
0.45ns*1
None
7.8µs
× 8
11
12
13
14
15
DIMM configuration type
Refresh rate/type
Primary SDRAM width
Error checking SDRAM width
Reserved
None
0
SDRAM device attributes:
Burst length supported
16
17
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0CH
08H
4,8
8
SDRAM device attributes: Number of
banks on SDRAM device
SDRAM device attributes:
/CAS latency
-8G
18
0
1
1
1
0
0
0
0
70H
4, 5, 6
-6E
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
38H
01H
04H
00H
3, 4, 5
19
20
21
DIMM Mechanical Characteristics
DIMM type information
SDRAM module attributes
3.8mm max.
SO-DIMM
Normal
Weak Driver
50Ω ODT Support
22
23
SDRAM device attributes: General
0
0
0
0
0
0
1
1
03H
Minimum clock cycle time at
CL = X − 1
-8G (CL = 5)
0
0
0
0
0
0
0
0
1
1
0
1
1
1
0
0
1
0
1
1
0
1
1
1
0
1
0
0
1
0
0
1
1
0
1
0
0
0
0
0
0
0
0
1
1
0
1
0
30H
3DH
45H
50H
3DH
50H
3.0ns*1
3.75ns*1
0.45ns*1
0.5ns*1
3.75ns*1
5.0ns*1
-6E (CL = 4)
Maximum data access time (tAC)
from clock at CL = X − 1
-8G (CL = 5)
24
25
-6E (CL = 4)
Minimum clock cycle time at
CL = X − 2
-8G (CL = 4)
-6E (CL = 3)
Data Sheet E1259E40 (Ver. 4.0)
5