ELM605DA
2A synchronous step-down DC/DC converter
In typical switching regulator design, the ESR of the output capacitor bank dominates the transient response.
The number of output capacitors can be determined by the following equations:
∆Vesr
∆Iout
ESRcap
ESRmax =
Number of capacitors =
ESRmax
∆Vser = change in output voltage due to ESR (assigned by the designer)
∆Iout = load transient
ESRcap = maximum ESR per capacitor (specified in manufacturer’s data sheet)
ESRmax = maximum allowable ESR
High frequency decoupling capacitors should be placed as closely to the power pins of the load as physically
possible. For the decoupling requirements, please consult the capacitor manufacturers for confirmation.
4. Output Voltage
The output voltage is set using the FB pin and a resistor divider connected to the output as shown in AP Circuit
below. The output voltage (Vout) can be calculated according to the voltage of the FB pin (Vfb) and ratio of the
feedback resistors by the following equation, where (Vfb) is 0.8V:
R2
Vfb = Vout ×
( R1 + R2 )
Thus the output voltage is:
( R1 + R2 )
Vout = 0.8 ×
R2
5. Layout consideration
The physical design of the PCB is the final stage in the design of power converter. If designed improperly, the
PCB could radiate excessive EMI and contribute instability to the power converter. Therefore, follow the PCB
layout guidelines below can ensure better performance of ELM605DA.
(1). The bold lines of AP Circuit below show the main power current paths. Keep the traces short and wide.
(2). To reduce resistive voltage drops and the number of via, ELM605DA and power components (Cin1, Cin2,
Cout and L) should be placed on the component side of the board and power current traces routed on its
component layer.
(3). SW node supports high frequency voltage swing (dv/dt). It should be routed small area.
(4). Place input capacitor CIN as close as possible to the IC pins (VIN and PGND).
(5). To avoid the switching noise from polluting the ELM605DA’s internal circuit, place a resistor between the
VIN and VCC pin. A bypass capacitor C8 (0.1µF) should be placed between analog ground pin (GND) and
VCC pin.
(6). Place feedback components (R1, R2 and C5 ) behind the output capacitor and near the ELM605DA. Keep
the feedback loop area small and away from SW node.
(7). To avoid PGND terminal is polluting the ELM605DA’s internal ground. The analog ground pin (GND)
should be connected to a clearer node as show in AP circuit below.
(8). To minimize parasitical capacitor couplings and magnetic field-to-loop couplings, the power converter
should be located away from other circuitry, especially from sensitive analog circuitry.
Rev.1.2
13 - 6