C9830
133 MHz Clock Generator for Intel 820 Chipset
Preliminary
Power on Bidirectional Pins
Power up Condition:
Pins 7, 8, 27, and 28 are Power up bi-directional pins and are used for selecting different functions in this device (see
Pin description). During power-up of the device, these pins are in input mode (see Fig 2, below), therefore, they are
considered input select pins internal to the IC. After a settling time, the Selection data is latch into internal control
registers and these pins become toggling clock outputs.
VDD Rail
Power Supply
Ramp
PCI0 / S2
PCI1/ S1
-
Hi-Z Inputs
Toggle Outputs
48MHz /S0
SIO/24_48#M
Select data is latched into register, then pin becomes clock output signal.
Fig. 2
Vdd
Strapping Resistor Options:
Rup
The power up bidirectional pins have a large value pull-
up each (250KΩ), therefore, a selection “1” is the
default. If the system uses a slow power supply (over
5mS settling time), then it is recommended to use an
external Pullup (Rup) in order to insure a high
50K
IMI C9830
Rd
Load
Bidirectional
JP1
JUMPER
selection. In this case, the designer may choose one of
two configurations, see Fig. 3A and Fig. 3B.
FIG.3A
Fig. 3A represents an additional pull up resistor 50KΩ
connected from the pin to the power line, which allows a
faster pull to a high level.
Rdn
5K
If a selection “0” is desired, then a jumper is placed on
JP1 to a 5KΩ resistor as implemented as shown in
Fig.4A. Please note the selection resistors (Rup, and
Rdn) are placed before the Damping resistor (Rd)
close to the pin.
JP2
Vdd
3 Way Jumper
Fig. 3B represent a single resistor 10KΩ connected to a
3-way jumper, JP2. When a “1” selection is desired, a
jumper is placed between leads1 and 3. When a “0”
selection is desired, a jumper is placed between leads 1
and 2.
Rsel
10K
IMI C9830
Rd
Load
Bidirectional
FIG.3B
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST
MILPITAS, CA 95035, USA TEL: 408-263-6300. FAX 408-263-6571
http://www.imicorp.com/
Rev 1.1
4/25/2000
Page 4 of 14
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