BCM43907 Preliminary Data Sheet
Table of Contents
SDIO 3.0—Device Mode ...................................................................................................................... 34
Description ..................................................................................................................................... 34
SDIO Pins ...................................................................................................................................... 35
SDIO 3.0—Host Mode.......................................................................................................................... 36
S/PDIF.......................................................................................................................................................... 36
SPI Flash ..................................................................................................................................................... 37
UART............................................................................................................................................................ 37
USB 2.0........................................................................................................................................................ 38
Overview ............................................................................................................................................... 38
USB 2.0 Features.................................................................................................................................. 41
Section 6: Global Functions............................................................................................. 42
External Coexistence Interface ................................................................................................................. 42
One-Time Programmable Memory............................................................................................................ 42
Hibernation Block....................................................................................................................................... 43
System Boot Sequence.............................................................................................................................. 43
Section 7: Wireless LAN Subsystem............................................................................... 44
WLAN CPU and Memory Subsystem........................................................................................................ 44
IEEE 802.11n MAC...................................................................................................................................... 44
PSM....................................................................................................................................................... 46
WEP...................................................................................................................................................... 46
TXE ....................................................................................................................................................... 47
RXE....................................................................................................................................................... 47
IFS......................................................................................................................................................... 47
TSF........................................................................................................................................................ 48
NAV....................................................................................................................................................... 48
MAC-PHY Interface............................................................................................................................... 48
IEEE 802.11™ a/b/g/n PHY ......................................................................................................................... 49
Section 8: WLAN Radio Subsystem ............................................................................... 51
Receiver Path.............................................................................................................................................. 51
Transmit Path.............................................................................................................................................. 51
Calibration................................................................................................................................................... 51
Section 9: Pinout and Signal Descriptions .................................................................... 53
Bump List.................................................................................................................................................... 54
Signal Descriptions.................................................................................................................................... 59
Section 10: GPIO Signals and Strapping Options.......................................................... 65
Overview...................................................................................................................................................... 65
Weak Pull-Down and Pull-Up Resistances............................................................................................... 65
Strapping Options ...................................................................................................................................... 66
Broadcom®
March 12, 2016 • 43907-DS104-R
Page 6
BROADCOM CONFIDENTIAL
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