PRELIMINARY
CYW4339
2. Power Supplies and Power Management
2.1 Power Supply Topology
One buck regulator, multiple LDO regulators, and a power management unit (PMU) are integrated into the CYW4339. All regulators
are programmable via the PMU. These blocks simplify power supply design for Bluetooth and WLAN functions in embedded designs.
A single VBAT (3.0V to 5.25V DC maximum) and VIO supply (1.8V to 3.3V) can be used, with all additional voltages being provided
by the regulators in the CYW4339.
Two control signals, BT_REG_ON and WL_REG_ON, are used to power up the regulators and take the respective section out of
reset. The CBUCK CLDO and LNLDO power up when any of the reset signals are deasserted. All regulators are powered down only
when both BT_REG_ON and WL_REG_ON are deasserted. The CLDO and LNLDO may be turned off and on based on the dynamic
demands of the digital baseband.
The CYW4339 allows for an extremely low power-consumption mode by completely shutting down the CBUCK, CLDO, and LNLDO
regulators. When in this state, LPLDO1 and LPLDO2 (which are low-power linear regulators that are supplied by the system VIO
supply) provide the CYW4339 with all the voltages it requires, further reducing leakage currents.
2.2 PMU Features
■ VBAT to 1.35V (275 mA nominal, 600 mA maximum) Core-Buck (CBUCK) switching regulator
■ VBAT to 3.3V (200 mA nominal, 450 mA maximum) LDO3P3
■ VBAT to 2.5V (15 mA nominal, 70 mA maximum) BTLDO2P5
■ 1.35V to 1.2V (100 mA nominal, 150 mA maximum) LNLDO
■ 1.35V to 1.2V (175 mA nominal, 300 mA maximum) CLDO with bypass mode for deep-sleep
■ Additional internal LDOs (not externally accessible)
The following figure shows the regulators and a typical power topology.
Document No. 002-14784 Rev. *H
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