BCM4319 Preliminary Data Sheet
Revision History
Revision
Date
Description
• Table 21, ”Core Buck Regulator (CBUCK),” on page 54
• Table 22, ”Internal PALDO,” on page 55
• Table 23, ”2.5V LDO (LDO2p5V),” on page 55
• Table 24, ”CLDO,” on page 56
• Table 25, ”LNLDO1, LNLDO2,” on page 57
• Section 13 ”Power-Up Sequence” on page 58
• Figure 21, ”Power-Up Sequence Timing Diagram,” on page 58
• Table 27, ”gSPI Timing,” on page 59
• Table 28, ”SDIO Bus Timing Parameters (Default Mode),” on page
60
• Table 29, ”SDIO Bus Timing Parameters (High-Speed Mode),” on
page 61
• Table 32, ”Ordering Information,” on page 65
• MAC Features:
• “WSE” on page 23
• “TXE” on page 23
• “RXE” on page 24
• “PHY Description” on page 25
• Signal Descriptions, “138-Ball WLBGA Package” on page 34
• Table 6, ”138-Ball WLBGA Signal Descriptions,” on page 34
Updated:
4319-DS02-R
7/24/09
• “SDIO Key Features” on page ii
• Table 1, ”Crystal Oscillator and External Frequency Reference
Specifications,” on page 7
• Table 4, ”138-Ball WLBGA Signal Descriptions,” on page 28
• Table 6, ”Strapping Options,” on page 36
• Table 8, ”Environmental Characteristics,” on page 37
• Table 10, ”Recommended Operating Conditions and DC
Characteristics,” on page 38
• Table 13, ”2.4 GHz Band General RF Specifications,” on page 42
• Table 15, ”2.4 GHz Receiver Sensitivity,” on page 44
• Table 16, ”2.4 GHz Band Transmitter RF Specifications,” on page 45
• “SDIO High Speed Mode Timing” on page 59
• Figure 18, ”138-Ball WLBGA Mechanical Information,” on page 62
• Table 32, ”Ordering Information,” on page 63
Broadcom®
April 2, 2014 • 4319-DS05-R
Single-Chip IEEE 802.11™ a/b/g/n MAC/Baseband/Radio
Page 5
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