BCM20730 Data Sheet
Revision History
Muxed on GPIO
1.2V
Tx RTS_N
UART_TXD
UART_RXD
SDA/
MOSI
SCL/
SCK
Rx
CTS_N
VDD_CORE
1.2V
MISO
1.2V VDD_CORE
Domain
WDT
28 ADC
Inputs
VSS,
VDDO,
VDDC
BSC/SPI
Master
Interface
(BSC is I2C -
compaƟble)
1.2V
POR
Test
UART
Periph 320K
UART ROM
Processing
Unit
(ARM -CM3)
60K
RAM
CT ɇ ѐ
ADC
1.2V
LDO
1.425V to 3.6V
1.62V to 3.6V
MIA
POR
System Bus
32 kHz
LPCLK
Peripheral
Interface
Block
I/O Ring
Control
Registers
Volt. Trans
hclk
VDD_IO
Domain
(24 MHz to 1 MHz)
RF Control
and Data
I/O Ring Bus
Bluetooth
Baseband
Core
2.4 GHz
Radio
3-D Glasses
and Triac
GPIO
Control/
Status
Keyboard
Matrix
3 -Axis
Mouse
Signal
IR
Mod.
and
SPI
M/S
PMU
Scanner
w/FIFO
24
MHz
Learning
Registers
Controller
Power
RF I/O
T/R
Frequency
Synthesizer
Switch
32 kHz
LPCLK
WAKE
128 kHz
LPO
6 Quadrature
Inputs (3 pair) +
High Current
IR
I/O
8 x 20
Scan
Matrix
40 GPIO
AutoCal
128 kHz
LPCLK
Driver Controls
1.2V VDD_RF
Domain
28 ADC
Inputs
÷ 4
PWM
14 GPIO on the 32-pin QFN
24 MHz Ref. Xtal
32 kHzꢀyƚĂůꢀ;ŽƉƟŽŶĂůͿꢀ
1.62V to 3.6V
VDD_IO
Figure 1: Functional Block Diagram
BROADCOM
®
September 9, 2013 • 20730-DS108-R
Page 2
BROADCOM CONFIDENTIAL
CYPRESS [ CYPRESS ]
