BCM20705 Data Sheet
List of Figures
List of Figures
Figure 1: System Block Diagram ....................................................................................................................... 1
Figure 2: Functional Block Diagram................................................................................................................. 11
Figure 3: PC Product Usage Model ................................................................................................................. 12
Figure 4: LDO Functional Block Diagram ........................................................................................................ 15
Figure 5: PCM Interface with Linear PCM Codec............................................................................................ 28
Figure 6: USB Compounded Device Configuration ......................................................................................... 31
Figure 7: Recommended Oscillator Configuration ........................................................................................... 37
Figure 8: Recommended TCXO Connection ................................................................................................... 37
Figure 9: 4.5 x 4 x 0.8 mm (WFBGA) Array..................................................................................................... 43
Figure 10: Startup Timing from Power-on Reset ............................................................................................. 55
Figure 11: USB Full-Speed Timing .................................................................................................................. 56
Figure 12: UART Timing .................................................................................................................................. 57
Figure 13: PCM Interface Timing (Short Frame Synchronization, Master Mode)............................................ 58
Figure 14: PCM Interface Timing (Short Frame Synchronization, Slave Mode).............................................. 59
Figure 15: PCM Interface Timing (Long Frame Synchronization, Master Mode)............................................. 60
Figure 16: PCM Interface Timing (Long Frame Synchronization, Slave Mode)............................................... 61
Figure 17: BSC Interface Timing Diagram....................................................................................................... 62
Figure 18: 50-Ball WFBGA Mechanical Drawing............................................................................................. 63
Figure 19: Reel, Labeling, and Packing Specification...................................................................................... 64
Broadcom®
Bluetooth Transceiver and Baseband Processor
November 13, 2014 • MCS20705-DS104-R
Page 6
BROADCOM CONFIDENTIAL
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