P R E L I M I N A R Y
Flash memory devices in FBGA packages may be
Special Handling Instructions for Fine
PItch Ball Grid Array (FBGA)
damaged if exposed to ultrasonic cleaning methods.
The package and/or data integrity may be
compromised if the package body is exposed to
temperatures above 150°C for prolonged periods of
time.
Special handling is required for Flash Memory products
in FBGA packages.
PIN CONFIGURATION
LOGIC SYMBOL
A0–A17
= 18 addresses
18
DQ0–DQ14 = 15 data inputs/outputs
A0–A17
16 or 8
DQ15/A-1
=
DQ15 (data input/output, word mode),
A-1 (LSB address input, byte mode)
DQ0–DQ15
(A-1)
BYTE#
CE#
=
=
=
=
=
=
=
Selects 8-bit or 16-bit mode
Chip enable
CE#
OE#
OE#
Output enable
WE#
WE#
Write enable
RESET#
BYTE#
RESET#
RY/BY#
VCC
Hardware reset pin, active low
Ready/Busy# output
RY/BY#
3.0 volt-only single power supply
(see Product Selector Guide for speed
options and voltage supply tolerances)
20514C-4
VSS
NC
=
=
Device ground
Pin not connected internally
Am29LV400
6
CYPRESS [ CYPRESS ]
