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7C372IL-83 参数 Datasheet PDF下载

7C372IL-83图片预览
型号: 7C372IL-83
PDF下载: 下载PDF文件 查看货源
内容描述: UltraLogic 64宏单元CPLD的Flash [UltraLogic 64-Macrocell Flash CPLD]
分类和应用:
文件页数/大小: 13 页 / 165 K
品牌: CYPRESS [ CYPRESS ]
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CY7C372i  
Output Current into Outputs ........................................ 16 mA  
Maximum Ratings  
Static Discharge Voltage...........................................> 2001V  
(per MIL–STD–883, Method 3015)  
(Above which the useful life may be impaired. For user guide-  
lines, not tested.)  
Latch-up Current.....................................................> 200 mA  
Storage Temperature .................................65°C to +150°C  
Operating Range  
Ambient Temperature with  
Power Applied.............................................55°C to +125°C  
Ambient  
VCC  
VCCINT  
Supply Voltage to Ground Potential............... –0.5V to +7.0V  
Range  
Temperature  
VCCIO  
DC Voltage Applied to Outputs  
in High-Z State ............................................... –0.5V to +7.0V  
Commercial  
0°C to +70°C  
5V ± 0.25V 5V± 0.25Vor  
3.3V ± 0.3V  
DC Input Voltage............................................ –0.5V to +7.0V  
DC Program Voltage.....................................................12.5V  
Industrial  
Military[2]  
40°C to +85°C  
5V ± 0.5V  
5V ± 0.5V  
3.3V ± 0.3V  
–55°C to +125°C 5V ± 0.5V  
Electrical Characteristics Over the Operating Range[3, 4]  
Parameter  
Description  
Test Conditions  
VCC = Min. IOH = –3.2 mA (Com’l/Ind)[5]  
OH = –2.0 mA (Mil)  
Min.  
2.4  
Typ.  
Max.  
Unit  
V
VOH  
Output HIGH Voltage  
I
2.4  
V
VOHZ  
VOL  
Output HIGH Voltage with VCC = Max. IOH = 0 µA (Com’l/Ind)[5, 6]  
4.0  
3.6  
0.5  
0.5  
7.0  
V
Output Disabled[8]  
I
OH = –50 µA (Com’l/Ind)[5, 6]  
V
Output LOW Voltage  
VCC = Min. IOL = 16 mA (Com’l/Ind)[5]  
V
IOL = 12 mA (Mil)  
V
VIH  
VIL  
Input HIGH Voltage  
Input LOW Voltage  
Guaranteed Input Logical HIGH Voltage for all  
Inputs[7]  
2.0  
V
Guaranteed Input Logical LOW Voltage for all  
Inputs[7]  
–0.5  
0.8  
V
IIX  
Input Load Current  
VI = Internal GND, VI = VCC  
–10  
–50  
+10  
+50  
µA  
µA  
IOZ  
Output Leakage Current  
VCC = Max., VO = GND or VO = VCC, Output  
Disabled  
VCC = Max., VO = 3.3V, Output Disabled[6]  
0
–70  
–125  
–160  
µA  
IOS  
ICC  
Output Short  
VCC = Max., VOUT = 0.5V  
–30  
mA  
Circuit Current[8, 9]  
Power Supply Current [10] VCC = Max., IOUT = 0 mA,  
f = 1 MHz, VIN = GND, VCC  
Com’l/Ind.  
Com’l “L” –66  
Military  
75  
45  
75  
125  
75  
mA  
mA  
mA  
µA  
200  
IBHL  
Input Bus Hold LOW  
Sustaining Current  
VCC = Min., VIL = 0.8V  
VCC = Min., VIH = 2.0V  
VCC = Max.  
+75  
–75  
IBHH  
IBHLO  
Input Bus Hold HIGH  
Sustaining Current  
µA  
µA  
µA  
Input Bus Hold LOW  
Overdrive Current  
+500  
IBHHO  
Input Bus Hold HIGH  
Overdrive Current  
VCC = Max.  
500  
Notes:  
2. T is the “instant on” case temperature.  
A
3. See the last page of this specification for Group A subgroup testing information.  
4. If V is not specified, the device can be operating in either 3.3V or 5V I/O mode; V = V .  
CCINT  
CCIO  
CC  
5. For SDO: I =–2 mA, I = 2 mA.  
OH  
OL  
6. When the I/O is three-stated, the bus-hold circuit can weakly pull the I/O to a maximum of 4.0V if no leakage current is allowed. This voltage is lowered significantly  
by a small leakage current. Note that all I/Os are three-stated during ISR programming. Refer to the application note “Understanding Bus Hold” for additional  
information.  
7. These are absolute values with respect to device ground. All overshoots due to system or tester noise are included.  
8. Not more than one output should be tested at a time. Duration of the short circuit should not exceed 1 second. V  
problems caused by tester ground degradation.  
= 0.5V has been chosen to avoid test  
OUT  
9. Tested initially and after any design or process changes that may affect these parameters.  
10. Measured with 16-bit counter programmed into each logic block.  
Document #: 38-03033 Rev. *A  
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