CCLD-054X-20-622.080
LVDS Clock Oscillator
Performance Specification
Nominal Frequency:
Frequency Stability
Min.
Typ.
622.08
Max
Units
MHz
ppm
±20
Output Phase Noise
@1KHz Offset
-100
-125
-138
-140
-142
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
@10KHz Offset
@100KHz Offset
@1MHz Offset
@10MHz Offset
dBc/Hz
pS,RMS
Jitter: 12KHz-20MHz
2
Differential Clock Rise Time
Differential Clock Fall Time
Output High Voltage, VOH
Output Low Voltage, VOL
Differential Output
0.2
0.5
0.5
0.7
0.7
1.60
nSec
nSec
V
0.2
1.40
1.10
330
0.90
247
V
454
50
VOD
mV
pSec
uA
Differential Output Error
Differential Output Skew
Output Leakage Current
200
±10
Output Load (differential)
Enable High Voltage, VIH
Disable Low Voltage, VIL
Output Enable/Disable Tiime
Duty Cycle @ 1.25V(LVDS)
Offset Voltage
100
Ohms
V
0.7*VCC
GND
VCC
0.3*VCC
400
V
nSec
%
45
1.125
0
50
1.2
3
55
1.375
25
V
Offset Error
V
Supply Voltage
3.15
3.3
3.45
80
V
Supply Current, Icc Enabled
Supply Current, Icc Disabled
Operating Temp.
mA
uA
°C
°C
10
-40
-45
+85
Storage Temp.
+90
Parameter
Conditions
MIL-STD-883, Method 2002
Mechanical Shock
Mechanical Vibration MIL-STD-883, Method 2007
Solderability MIL-STD-883, Method 2003
Resistance to Solvents MIL-STD-883, Method 2016
Rev.: B
Date: 10-10-07