CCLD-034 5x7mm SMD
LVDS Clock Oscillator
Frequency Range:
Frequency Stability Options(ppm):
162.000Mhz to 312.500Mhz
±20, ±25, ±50, ±100
Temperature Range: (standard)
(Option M)
0°C to +70°C
-20°C to +70°C
-40°C to +85°C
(Option X)
Storage:
-55°C to 120°C
Input Voltage:
Input Current:
3.3V ± 0.3V
45mA Typ., 66mA Max
Output:
Differential LVDS
Symmetry:
Rise/Fall Time:
45/55% Max @ 50%Vdd
1nsec Max @ 20% to 80% Vdd
Load: 100 Ohms
Logic:
Connected between OUT and COUT
Output Voltage Levels “0”=0.90 Min., 1.10 Typ.
“1”=1.43 Typ., 1.60 Max
247mV Min., 454mV Max
200nSec Max
Differential Output Voltage:
Disable Time
Enable Time
2mSec Max
Phase Jitter:
Phase Noise:
Sub-harmonics:
Aging:
12KHz~80MHz
(See Plot Below)
0.5psec Typ., 1psec RMS Max
None
<3ppm 1st/yr, <1ppm every year thereafter
Actual CCLD-034-50-250.000MHz Plot
Rev.: E
Date: 10-10-07
CRYSTEKMICROWAVE [ CRYSTEK CORPORATION ]
