CCLD-033 5×7mm SMD
LVDS Clock Oscillator
CCLD-033 Model
5×7 mm SMD, 3.3V, LVDS
Frequency Range:
Frequency Stability Options(ppm):
Temperature Range:
(Option M)
77.760 MHz to 161.000 MHz
±20, ±25, ±50, ±100
(standard) 0°C to +70°C
-20°C to +70°C
(Option X)
-40°C to +85°C
Storage:
-45°C to 90°C
Input Voltage:
3.3V ± 0.3V
Input Current:
Standby Current:
Output:
66mA Max
30uA Max
Differential LVDS
Symmetry:
Rise/Fall Time:
Load:
Output Drive Capability (see Note 1):
Logic:
45/55% Max @ zero crossing point
1ns Max (20% to 80%)
100 Ohms Connected between OUT and COUT
Zero Impedance Bipolar Process
Output Voltage Levels
“0”=0.90 Min, 1.10 Typical
“1”=1.43 Typical, 1.60 Max
247mV Min, 454mV Max
200ns Max
Differential Output Voltage:
Disable Time:
Start-up Time:
10ms Max
Phase Jitter: 12kHz~80MHz
Phase Noise: (See Plot Below)
Sub-harmonics:
0.5ps Typical, 1ps RMS Max
None
Aging:
<3ppm 1st year, <1ppm every year thereafter
Note 1:
Internal Driver will change to Finite Impedance CMOS Process. Consult factory for additional details and changeover date.
Typical Phase Noise Plot
Rev: S
Date: 26-Aug-2021
Page 2 of 3
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