RESET Circuit Waveform
(1) = No Delay Capacitor
(2) = With Delay Capacitor
(3) = Max: RESET Voltage (1.0V)
V
OUT
V
RH
V
RT(ON)
V
RT(OFF)
(1)
RESET
(2)
(3)
V
RL
t
Delay
Delay
V
DH
V
DC(HI)
V
DC(LO)
V
DIS
(2)
Circuit Description
output voltage falls below VRT(OFF). The Delay capacitor is
fully discharged anytime the output voltage falls out of
regulation, even for a short period of time. This feature
ensures a controlled RESET pulse is generated following
detection of an error condition. The circuit allows
the RESET output transistor to go to the OFF (open) state
only when the voltage on the Delay lead is higher than
The CS8126 RESET function, has hysteresis on both the
Reset and Delay comparators, a latching Delay capacitor
discharge circuit, and operates down to 1V.
The RESET circuit output is an open collector type with
ON and OFF parameters as specified. The RESET output
NPN transistor is controlled by the two circuits described
(see Block Diagram).
VDC(H1)
.
Low Voltage Inhibit Circuit
The Delay time for the RESET function is calculated from
the formula:
This circuit monitors output voltage, and when the output
voltage falls below VRT(OFF), causes the RESET output tran-
sistor to be in the ON (saturation) state. When the output
voltage rises above VRT(ON), this circuit permits the RESET
output transistor to go into the OFF state if allowed by
the RESET Delay circuit.
C
Delay ´ VDelay Threshold
Delay time =
ICharge
Delay time = CDelay ´ 3.2 ´ 105
RESET Delay Circuit
If CDelay = 0.1µF, Delay time (ms) = 32ms ± 50%: i.e. 16ms
to 48ms. The tolerance of the capacitor must be taken into
account to calculate the total variation in the delay time.
This circuit provides a programmable (by external capaci-
tor) delay on the RESET output lead. The Delay lead pro-
vides source current to the external delay capacitor only
when the "Low Voltage Inhibit" circuit indicates that out-
put voltage is above VRT(ON). Otherwise, the Delay lead
sinks current to ground (used to discharge the delay
capacitor). The discharge current is latched ON when the
5
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
