Absolute Maximum Ratings
Power Dissipation.............................................................................................................................................Internally Limited
Peak Transient Voltage (46V Load Dump) .................................................................................................................-50V, 60V
Output Current .................................................................................................................................................Internally Limited
ESD Susceptibility (Human Body Model)..............................................................................................................................4kV
Junction Temperature.............................................................................................................................................-40¡C to 150¡C
Storage Temperature...............................................................................................................................................-55¡C to 150¡C
Lead Temperature Soldering Wave Solder (through hole styles only) ..........................................10 sec. max, 260¡C peak
Reflow (SMD styles only) ..........................................60 sec. max above 183¡C, 230¡C peak
Electrical Characteristics: TA = -40ûC to +125ûC, TJ = -40ûC to +150ûC, VIN = 6 to 26V, IO=5 to 500mA,
RRESET = 4.7k½ to VCC, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
■ Output Stage (VOUT
)
Output Voltage
4.85
5.00
5.15
0.60
V
V
Dropout Voltage
Supply Current
I
OUT = 500mA
0.35
IOUT ² 10mA
IOUT ² 100mA
IOUT ² 500mA
2
6
55
7
12
100
mA
Line Regulation
Load Regulation
Ripple Rejection
VIN = 6 to 26V, IOUT = 50mA
IOUT = 50 to 500mA, VIN = 14V
5
50
50
mV
mV
dB
10
75
f = 120Hz, VIN = 7 to 17V,
IOUT = 250mA
54
Current Limit
0.75
32
1.20
A
V
V
V
Overvoltage Shutdown
Maximum Line Transient
40
VOUT ² 5.5V
95
Reverse Polarity Input
Voltage DC
VOUT ³ -0.6V, 10½ Load
-15
-30
Reverse Polarity Input
Voltage Transient
1% Duty Cycle, T < 100ms,
10½ Load
-80
V
Thermal Shutdown
Guaranteed by Design
150
5
180
210
15
¡C
RESET
■
and Delay Functions
Delay Charge Current
RESET Threshold
VDelay = 2V
10
µA
VOUT Increasing, VRT(ON)
VOUT Decreasing, VRT(OFF)
4.65
4.50
4.90
4.70
VOUT - 0.01
VOUT - 0.15
V
V
RESET Hysteresis
Delay Threshold
VRH = VRT(ON) - VRT(OFF)
150
200
250
mV
Charge, VDC(HI)
Discharge, VDC(LO)
3.25
2.85
3.50
3.10
3.75
3.35
V
V
Delay Hysteresis
200
400
0.1
0
800
0.4
10
mV
V
RESET Output Voltage Low
1V < VOUT < VRTL , 3k½ to VOUT
VOUT > VRT(ON)
RESET Output Leakage
Current
µA
Delay Capacitor
Discharge Latched ÒONÓ,
VOUT > VRT
0.2
32
0.5
48
V
Discharge Voltage
Delay Time
CDelay = 0.1µF* (Note 1)
16
ms
C
Delay ´ VDelay Threshold Charge
Delay Time =
= CDelay x 3.2 x 105 (typ)
ICharge
Note 1: assumes ideal capacitor
2
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
