Circuit Description: continued
If the input voltage rises above 30V (e.g. load dump), the
Function
RESET
output shuts down. This response protects the internal cir-
cuitry and enables the IC to survive unexpected voltage
transients.
RESET
A
signal (low voltage) is generated as the IC pow-
ers up (VOUT > VOUT - 100mV) or when VOUT drops out of
regulation (VOUT < VOUT - 140mV, typ). 40mV of hysteresis
is included in the function to minimize oscillations.
Using an emitter sense scheme, the amount of current
through the NPN pass transistor is monitored. Feedback
circuitry insures that the output current never exceeds a
preset limit.
RESET
The
output is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC, thereby
guaranteeing that the RESET signal is valid for VOUT as
low as 1V.
Should the junction temperature of the power device
exceed 180ûC (typ) the power transistor is turned off.
Thermal shutdown is an effective means to prevent die
overheating since the power transistor is the principle
heat source in the IC.
RESET
An external RC network on the
lead (Figure 4) pro-
vides a sufficiently long delay for most microprocessor
based applications. RC values can be chosen using the
following formula:
ÐtDelay
Regulator Control Functions
RTOT ´ CRST
VT Ð VOUT
ln
The CS8121 contains two microprocessor compatible con-
ENABLE
RESET
(Figure 3).
trol functions:
and
[
]
)
(
VRST Ð VOUT
FOR 7V < V < 26V
IN
where:
RTOT = RRST in parallel with RIN
,
V
IN
RIN = µP port impedance,
RESET
CRST
=
delay capacitor,
ENABLE
tDelay = desired delay time,
RESET
HI
V
IN(HI)
VRST = VSAT of
lead (0.7V @ turn - on), and
LO
VT = µP logic threshold voltage.
VRT(ON)
VRT(OFF)
V
OUT
(1)
VOUT
5V to mP
and
System
Power
VR
VR
PEAK
PEAK
(2)
VR
SAT
RESET
10mF
tantalum
R
RST
CS8121
(1) = NO RESET DELAY CAPACITOR
(2) = WITH RESET DELAY CAPACITOR
to mP
RESET
Port
RESET
Figure 3. Circuit Waveforms for the CS8121
C
RST
ENABLE
Function
The
function switches the output transistor.
ENABLE
When the voltage on the
ENABLE
lead exceeds 2.9V typ,
Figure 4. RC Network for
Delay
RESET
the output pass transistor turns off, leaving a high
impedance facing the load. The IC will remain in Sleep
mode, drawing only 250µA, until the voltage on the lead
drops below 2.1V typ. Hysteresis (800mV) is built into the
ENABLE
function to provide good noise immunity.
5