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CS52843EDR8 参数 Datasheet PDF下载

CS52843EDR8图片预览
型号: CS52843EDR8
PDF下载: 下载PDF文件 查看货源
内容描述: 电流模式PWM控制电路 [Current Mode PWM Control Circuit]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管
文件页数/大小: 6 页 / 149 K
品牌: CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
 浏览型号CS52843EDR8的Datasheet PDF文件第1页浏览型号CS52843EDR8的Datasheet PDF文件第2页浏览型号CS52843EDR8的Datasheet PDF文件第3页浏览型号CS52843EDR8的Datasheet PDF文件第4页浏览型号CS52843EDR8的Datasheet PDF文件第6页  
Circuit Description  
When the power supply sees a sudden large output cur-  
Setting the Oscillator  
rent increase, the control voltage will increase allowing the  
duty cycle to momentarily increase. Since the duty cycle  
tends to exceed the maximum allowed to prevent trans-  
former saturation in some power supplies, the internal  
oscillator waveform provides the maximum duty cycle  
clamp as programmed by the selection of oscillator timing  
components.  
The times Tc and Td can be determined as follows:  
VREF - VLOWER  
tc = RTCT ln  
(
)
VREF - VUPPER  
VREF - IdRT - VLOWER  
VREF - IdRT - VUPPER  
td = RTCT ln  
(
)
V
OSC  
OSC  
RESET  
Substituting in typical values for the parameters in the  
above formulas:  
Toggle  
F/F Output  
VREF = 5.0V, VUPPER = 2.7V, VLOWER = 1.0V, Id = 8.3mA,  
then  
EA Output  
Switch  
Current  
tc 0.5534RTCT  
V
CC  
I
O
O
2.3 - 0.0083 RT  
td = RTCT ln  
(
)
4.0 - 0.0083 RT  
V
For better accuracy R should be 10k.  
T
Figure 2: Timing Diagram  
Grounding  
High peak currents associated with capacitive loads neces-  
sitate careful grounding techniques. Timing and bypass  
capacitors should be connected close to Gnd in a single  
point ground.  
VREF  
OSC  
Gnd  
RT  
CT  
The transistor and 5kpotentiometer are used to sample  
the oscillator waveform and apply an adjustable ramp to  
Sense.  
Vupper  
Vlower  
tc  
td  
Sawtooth Mode  
LARGE RT (10k)  
VOSC  
Internal Clock  
Triangular Mode  
SMALL RT (700k)  
VREF  
Internal Clock  
Figure 3: Oscillator Timing Network and Parameters  
5