Application Information
Typical Performance Characteristics
Theory of Operation
V
OUT
V
Feed Forward Voltage Mode Control
COMP
In conventional voltage mode control, the ramp signal has
fixed rising and falling slope. The feedback signal is
derived solely from the output voltage. Consequently,
voltage mode control has inferior line regulation and audio
susceptibility.
FF
V
IN
R C
T
T
Feed forward voltage mode control derives the ramp sig-
nal from the input line, as shown in Fig.1. Therefore, the
ramp of the slope varies with the input voltage. At the start
of each switch cycle, the capacitor connected to the FF pin
is charged through a resistor connected to the input volt-
age. Meanwhile, the Gate output is turned on to drive an
external power switching device. When the FF pin voltage
reaches the error amplifier output VCOMP, the PWM com-
parator turns off the Gate, which in turn opens the external
switch. Simultaneously, the FF capacitor is quickly dis-
charged to 0.3V.
GATE
Figure 2: Pulse Width Modulated by Output Current with Constant
Input Voltage.
V
IN
V
COMP
Overall, the dynamics of the duty cycle are controlled by
both input and output voltages. As illustrated in Fig. 2,
with a fixed input voltage the output voltage is regulated
solely by the error amplifier. For example, an elevated
output voltage reduces VCOMP which in turn causes duty
cycle to decrease. However, if the input voltage varies, the
slope of the ramp signal will react immediately which pro-
vides a much improved line transient response. As an
example shown in Fig.3, when the input voltage goes up,
the rising edge of the ramp signal increases which reduces
duty cycle to counteract the change.
FF
I
OUT
R C
T
T
GATE
Figure 3: Pulse Width modulated by Input Voltage with constant
Output Current.
V
IN
V
OUT
Power Stage
GATE
Powering the IC & UVL
Latch & Driver
R
Feedback Network
The Under Voltage Lockout (UVL) comparator has two
voltage references; the start and stop thresholds. During
power-up, the UVL comparator disables VREF (which in-
turn disables the entire IC) until the controller reaches its
PWM
FF
-
COMP
FB
+
V
CC start threshold. During power-down, the UVL com-
C
+
Error Amplifier
-
parator allows the controller to operate until the VCC stop
threshold is reached. The CS51221 requires only 50µA dur-
ing startup. The output stage is held at a low impedance
state in lock out mode.
Figure 1: Feed Forward Voltage Mode Control.
During power up and fault conditions, the soft-start
clamps the Comp pin voltage and limits the duty cycle.
The power up transition tends to generate temporary duty
cycles much greater than the steady state value due to the
low output voltage. Consequently, excessive current
stresses often take place in the system. Soft Start technique
alleviates this problem by gradually releasing the clamp on
the duty cycle to eliminate the in-rush current. The dura-
tion of the Soft Start can be programmed through a capaci-
tance connected to the SS pin. The constant charging cur-
rent to the SS pin is 50µA (typ).
The feed forward feature can also be employed to provide
a volt-second clamp, which limits the maximum product
of input voltage and turn on time. This clamp is used in
circuits, such as Forward and Flyback converter, to prevent
the transformer from saturating. Calculations used in the
design of the volt-second clamp are presented in the
Design Guidelines section.
7
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
