Block Diagram
V
V
C
V
REF
RG
I
C
Oscillator
Comparator
V
GATE
GATE
C
OSC
Flip-Flop
A1
7I
G1
R
Q
C
PGnd
F2
V
FB
S
Q
G2
Comparator
V
-
FB
A6
2.5V
1.5V
OK
1.25V
+
0.7V
V
CC
+
Hold
Off
V
REF
Comp
-
V
CC
V
CC
3.3V
-
Fault
Comp
1.15V
V
REF
= 3.3V
+
G4
CS Charge
Sense
Comparator
G3
I
T
A4
CS
Comparator
CS
2.3V
A2
R
Q
Q
F1
I
5
I
T
T
55
G5
S
1.5V
2.5V
Slow Discharge
Flip-Flop
A3
+
Slow Discharge
Comparator
2.4V
Gnd
Figure 1: Block Diagram for CS51031
Circuit Description
At startup, the voltage on all pins is zero. As VCC rises, the
VC voltage along with the internal resistor RG keeps the
PFET off. As VCC and VC continue to rise, the oscillator
capacitor (COSC ) and the Soft start/Fault Timing capacitor
(CS) charges via internal current sources. COSC gets
charged by the current source IC and CS gets charged by
the IT source combination described by:
Theory of Operation
Control Scheme
The CS51031 monitors and the output voltage to determine
when to turn on the PFET. If VFB falls below the internal
reference voltage of 1.25V during the oscillatorÕs charge
cycle, the PFET is turned on and remains on for the dura-
tion of the charge time. The PFET gets turned off and
remains off during the oscillatorÕs discharge time with the
maximum duty cycle to 80%. It requires 7mV typical, and
20mV maximum ripple on the VFB pin is required to oper-
ate. This method of control does not require any loop sta-
bility compensation.
IT IT
ICS = IT -
+
.
(
)
55
5
The internal Holdoff Comparator ensures that the external
PFET is off until VCS > 0.7V, preventing the GATE flip-flop
(F2) from being set. This allows the oscillator to reach its
operating frequency before enabling the drive output. Soft
start is obtained by clamping the VFB comparatorÕs (A6)
reference input to approximately 1/2 of the voltage at the
CS pin during startup, permitting the control loop and the
output voltage to slowly increase. Once the CS pin charges
above the Holdoff Comparator trip point of 0.7V, the low
feedback to the VFB Comparator sets the GATE flip-flop
during COSC Õs charge cycle. Once the GATE flip-flop is set,
VGATE goes low and turns on the PFET. When VCS exceeds
Startup
The CS51031 has an externally programmable soft start fea-
ture that allows the output voltage to come up slowly, pre-
venting voltage overshoot on the output.
4
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
