4V ≤ VCC ≤ 26V, -40˚C < TA = 125°C, (unless otherwise specified)
Electrical Characteristics:
PARAMETER TEST CONDITIONS
ꢀ External Drive (OUTPUT): continued
MIN
TYP
MAX
UNIT
Voltage to Duty Cycle
Conversion
4V ≤ VCC < 7V
VCC = 13V, CTL = 1V
VCC = 13V, CTL = 2V
65
100
75
%
%
7V ≤ VCC ≤ 18V
VCC = 13V, CTL = 30% VREG
VCC = 13V, CTL = 55.8% VREG
28.3
56.0
36.3
64.0
%
%
18V < VCC ≤ 26V
VCC = 13V, CTL = 1. 5V
VCC = 13V, CTL = 3. 5V
11.8
34.2
21.8
44.2
%
%
Output Rise Time
Output Fall Time
Output Sink Current
4V ≤ VCC ≤ 26V
RGATE = 6Ω, CGATE = 5nF
.25
.30
1
µs
4V ≤ VCC ≤ 26V
RGATE = 6Ω, CGATE = 5nF
1
µs
4V ≤ VCC < 7V
RGATE = 6Ω, CGATE = 5nF
150
300
150
300
mA
mA
mA
mA
7V ≤ VCC ≤ 26V
R
GATE = 6Ω, CGATE = 5nF
Output Source Current
4V ≤ VCC < 7V
RGATE = 6Ω, CGATE = 5nF
7V ≤ VCC ≤ 26V
RGATE = 6Ω, CGATE = 5nF
Output High Voltage
Output Low Voltage
IOUT = 1mA
IOUT = -1mA
VBOOST - 1.7
V
V
1.3
ꢀ Charge Pump (DRV)
Boost Voltage
VCC + 6.4
V
Package Lead Description
PACKAGE LEAD #
LEAD SYMBOL
FUNCTION
16 Lead PDIP
1
2
OUTPUT
BOOST
FLT
MOSFET gate drive
Boost voltage
3
Fault time out capacitor
Oscillator resistor
4
ROSC
COSC
CTL
5
Oscillator capacitor
Pulse width control input
6
7
PGnd
VCC
Power ground for on chip clamp
Positive power supply input
5V linear regulator
8
9
VREG
SNI
10
11
12
13
14
15
16
Sense inductor current
Collector of boost power transistor
Current sense minus
Current sense plus
PMP
ISENSE-
ISENSE+
IADJ
Current limit adjust
INH
Output Inhibit
Gnd
Ground
1197