CEP02N7G/CEB02N7G
CEF02N7G
10
8
101
VDS=480V
ID=2A
RDS(ON)Limit
100µs
1ms
10ms
100
6
DC
4
10-1
2
TC=25 C
TJ=175 C
Single Pulse
0
10-2
100
101
102
103
0
3
6
9
12
Qg, Total Gate Charge (nC)
VDS, Drain-Source Voltage (V)
Figure 7. Gate Charge
Figure 8. Maximum Safe
Operating Area
VDD
on
t
toff
d(off)
t
r
t
d(on)
OUT
RL
t
f
t
VIN
90%
10%
90%
D
OUT
V
V
VGS
10%
INVERTED
RGEN
G
90%
50%
50%
S
IN
V
10%
PULSE WIDTH
Figure 10. Switching Waveforms
Figure 9. Switching Test Circuit
100
D=0.5
0.2
0.1
10-1
PDM
0.05
t1
t2
0.02
0.01
1. Rθ JC (t)=r (t) * Rθ JC
2. Rθ JC=See Datasheet
3. TJM-TC = P* Rθ JC (t)
4. Duty Cycle, D=t1/t2
Single Pulse
10-2
10-5
10-4
10-3
10-2
10-1
100
101
Square Wave Pulse Duration (sec)
Figure 11. Normalized Thermal Transient Impedance Curve
4