Dual P-Channel Enhancement Mode Field Effect Transistor
FEATURES
-30V, -3.6A, R
DS(ON)
= 58mΩ @V
GS
= -10V.
R
DS(ON)
= 85mΩ @V
GS
= -4.5V.
Super High dense cell design for extremely low R
DS(ON)
.
High power and current handing capability.
Lead free product is acquired.
TSSOP-8 for Surface Mount Package.
G
2
S
2
S
2
D
CEG8304
PRELIMINARY
D
1
1
S
1
S
1
G
1
2
3
4
8 D
2
7 S
2
6 S
2
5 G
2
G
1
S
1
S
1
D
TSSOP-8
ABSOLUTE MAXIMUM RATINGS
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
Drain Current-Pulsed
a
T
A
= 25 C unless otherwise noted
Symbol
V
DS
V
GS
I
D
I
DM
P
D
T
J
,T
stg
Limit
-30
Units
V
V
A
A
W
C
±
20
-3.6
-14
1.25
-55 to 150
Maximum Power Dissipation
Operating and Store Temperature Range
Thermal Characteristics
Parameter
Thermal Resistance, Junction-to-Ambient
b
Symbol
R
θJA
Limit
100
Units
C/W
This is preliminary information on a new product in development now .
Details are subject to change without notice .
1
Rev 1. 2008.June
http://www.cetsemi.com
CET [ CHINO-EXCEL TECHNOLOGY ]
