CEF04N6
Feb. 2003
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
6
600V , 2.5A , R
DS(ON)
=2.5
Ω
@V
GS
=10V.
Super high dense cell design for extremely low R
DS(ON)
.
High power and current handling capability.
TO-220F full-pak for through hole
D
G
G
D
S
S
TO-220F
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
-Pulsed
Drain-Source Diode Forward Current
Maximum Power Dissipation
@Tc=25 C
Derate above 25 C
Operating and Storage Temperautre Range
Symbol
V
DS
V
GS
I
D
I
DM
I
S
P
D
T
J
, T
STG
Limit
600
30
2.5
10
2.5
35
0.28
-55 to 150
Unit
V
V
A
A
A
W
W/ C
C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
R
JC
R
JA
6-122
3.6
65
C/W
C/W
CET [ CHINO-EXCEL TECHNOLOGY ]
