24LC02
2048-Bits Serial EEPROM with Write Protect
! ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢉꢊꢈꢋ
start cycle
CONTROL
LOGIC
H.V.
GENERATION
TIMING
START
STOP
LOGIC
SDA
SCL
&
ck
CONTROL
load
inc
SLAVE
6
WORD
ADDRESS
COUNTER
ADDRESS
REGISTER
&
EEPROM
ARRAY
A0
A1
A2
64
COMPARATOR
XDEC
DATA
BIT
64X4X8
4
2
R/W ~
YDEC
8
DATA
REGISTER
VCC
VSS
Din
Dout
DOUT
ACK
! ꢌꢍꢎꢂꢁꢏꢐꢑꢅꢒꢈꢓꢇꢋꢏꢋꢅꢔꢈꢐꢇꢕꢉꢎ
%ꢀꢁꢂꢃꢄꢅꢆꢇꢅꢈꢉꢅꢂꢃꢀꢊꢂꢅꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋ&=ꢌ°+ꢆꢀꢁꢆAꢆ! ꢌ°+
)ꢁꢍꢀꢃꢄꢅꢆꢎꢏꢀꢐꢆꢑꢅꢒꢉꢅꢓꢀꢆꢀꢁꢆ?ꢂꢁꢊꢔꢕꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋꢋ&ꢖꢋ@ ꢀꢁꢆA =ꢋꢌꢆ)
ꢀ
ꢀ
ꢗ:ꢇ7'ꢆ ꢇꢐꢅꢒꢅꢆ ꢃꢂꢅꢆ %ꢇꢑ7%%ꢆ ꢂꢃꢀꢏꢔꢄꢆ ꢁꢔꢍꢘꢋꢆ ꢙꢉꢉꢂꢁꢉꢂꢏꢃꢀꢅꢆ ꢓꢁꢔꢕꢏꢀꢏꢁꢔꢒꢆ ꢚꢁꢂꢆ ꢁꢉꢅꢂꢃꢀꢏꢔꢄꢆ ꢀꢐꢅꢒꢅꢆ ꢕꢅꢛꢏꢓꢅꢒꢆ ꢄꢏꢛꢅꢔꢆ ꢅꢍꢒꢅꢎꢐꢅꢂꢅꢆ ꢈꢃꢘ
ꢉꢅꢂꢈꢃꢔꢅꢔꢀꢍꢘꢆꢕꢃꢈꢃꢄꢅꢆꢀꢐꢅꢆꢉꢃꢂꢀꢋꢆ,ꢂꢁꢍꢁꢔꢄꢅꢕꢆꢅ<ꢉꢁꢒꢊꢂꢅꢆꢀꢁꢆꢈꢃ<ꢏꢈꢊꢈꢆꢂꢃꢀꢏꢔꢄꢒꢆꢈꢃꢘꢆꢃꢚꢚꢅꢓꢀꢆꢕꢅꢛꢏꢓꢅꢆꢂꢅꢍꢏꢃꢜꢏꢍꢏꢀꢘꢋ
! ꢖꢗꢑꢊꢈꢐꢇꢕꢉꢅꢘꢂꢕꢙꢇꢐꢇꢂꢕꢎ
ꢇꢅꢈꢉꢅꢂꢃꢀꢊꢂꢅꢆꢊꢔꢕꢅꢂꢆꢜꢏꢃꢒ'ꢆ ꢆ 48+ꢖ ꢋꢋꢋꢋꢋBꢋꢆ ꢆ ꢆ ꢆ ꢖ°+ꢆꢀꢁꢆAꢆ(ꢖ°+ꢆ ꢆ ꢆ 2+ꢁꢈꢈꢅꢂꢓꢏꢃꢍ3
* All specs and applications shown above subject to change without prior notice.
1F-5 NO.66 SEC.2 NAN-KAN RD ., LUCHU , TAOYUAN, TAIWAN
Tel:886-3-3214525
Email: server@ceramate.com.tw
Http: www.ceramate.com.tw
Rev 1.0 Dec. 26, 2001
Page 2 of 12
Fax:886-3-3521052
CERAMATE [ CERAMATE TECHNICAL ]
