CAT24WC128
Preliminary
ABSOLUTE MAXIMUM RATINGS*
*COMMENT
Temperature Under Bias ................. –55°C to +125°C
Storage Temperature....................... –65°C to +150°C
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of
the device at these or any other conditions outside of those
listed in the operational sections of this specification is not
implied. Exposure to any absolute maximum rating for
extended periods may affect device performance and
reliability.
Voltage on Any Pin with
Respect to Ground(1) ........... –2.0V to +VCC + 2.0V
VCC with Respect to Ground ............... –2.0V to +7.0V
Package Power Dissipation
Capability (Ta = 25°C)................................... 1.0W
Lead Soldering Temperature (10 secs) ............ 300°C
Output Short Circuit Current(2) ........................ 100mA
RELIABILITY CHARACTERISTICS
Symbol
Parameter
Endurance
Min.
100,000
100
Max.
Units
Cycles/Byte
Years
Reference Test Method
MIL-STD-883, Test Method 1033
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 3015
JEDEC Standard 17
(3)
NEND
(3)
TDR
Data Retention
ESD Susceptibility
Latch-up
(3)
VZAP
2000
100
Volts
(3)(4)
ILTH
mA
D.C. OPERATING CHARACTERISTICS
= +1.8V to +6.0V, unless otherwise specified.
V
CC
Limits
Typ.
Symbol
Parameter
Min.
Max.
Units
Test Conditions
I
I
I
Power Supply Current - Read
1
mA
f
V
= 100 KHz
=5V
CC1
SCL
CC
Power Supply Current - Write
Standby Current
3
0
mA
f
= 100 KHz
=5V
CC2
SCL
V
CC
(5)
µA
V
V
= GND or V
=5V
SB
IN
CC
CC
I
I
Input Leakage Current
Output Leakage Current
Input Low Voltage
3
3
µA
µA
V
V
= GND to V
LI
IN
CC
V
OUT
= GND to V
CC
LO
V
V
V
V
–1
x 0.7
V
x 0.3
IL
CC
Input High Voltage
V
V
+ 0.5
V
IH
CC
CC
Output Low Voltage (V
= +3.0V)
= +1.8V)
0.4
0.5
V
I
I
= 3.0 mA
OL1
OL2
CC
CC
OL
Output Low Voltage (V
V
= 1.5 mA
OL
CAPACITANCE T = 25°C, f = 1.0 MHz, V
= 5V
A
CC
Symbol
Test
Max.
Units
Conditions
VI/O = 0V
VIN = 0V
(3)
CI/O
Input/Output Capacitance (SDA)
Input Capacitance (SCL, WP)
8
6
pF
pF
(3)
CIN
Note:
(1) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC
voltage on output pins is V +0.5V, which may overshoot to V + 2.0V for periods of less than 20ns.
CC
CC
(2) Output shorted for no more than one second. No more than one output shorted at a time.
(3) This parameter is tested initially and after a design or process change that affects the parameter.
(4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to V +1V.
CC
(5) Standby current (I ) = 0 µA (<900 nA).
SB
Doc. No. 25060-00 6/99 S-1
2
CATALYST [ CATALYST SEMICONDUCTOR ]
