Preliminary Information
CAT1026, CAT1027
DEVICE OPERATION
Reset Controller Description
The CAT1026 and CAT1027 precision RESET
controllers ensure correct system operation during
brownout and power up/down conditions. They are
configured with open drain RESET outputs.
Data Protection
TheCAT1026andCAT1027deviceshavebeendesigned
tosolvemanyofthedatacorruptionissuesthathavelong
been associated with serial EEPROMs. Data corruption
occurswhenincorrectdataisstoredinamemorylocation
which is assumed to hold correct data.
During power-up, the RESET outputs remain active
until VCC reaches the VTH threshold and will continue
driving the outputs for approximately 200ms (tPURST
)
WheneverthedeviceisinaResetcondition,theembedded
EEPROM is disabled for all operations, including write
operations. If the Reset output(s) are active, in progress
communicationstotheEEPROMareabortedandnonew
communications are allowed. In this condition an internal
write cycle to the memory can not be started, but an in
progressinternalnon-volatilememorywritecyclecannot
be aborted. An internal write cycle initiated before the
Reset condition can be successfully finished if there is
enough time (5ms) before VCC reaches the minimum
value of 2V.
after reaching VTH. After the tPURST timeout interval, the
device will cease to drive the reset outputs. At this point
the reset outputs will be pulled up or down by their
respective pull up/down resistors.
During power-down, the RESET outputs will be active
when VCC falls below VTH. The RESET output will be
valid so long as VCC is >1.0V (VRVALID). The device is
designedtoignorethefastnegativegoingVCC transient
pulses (glitches).
Reset output timing is shown in Figure 1.
In addition, to avoid data corruption due to the loss of
power supply voltage during the memory internal write
operation, the system controller should monitor the
unregulated DC power. Using the second voltage sensor,
Manual Reset Capability
TheRESET pincanoperateasresetoutputandmanual
reset input. The input is edge triggered; that is, the
RESET input will initiate a reset timeout after detecting
a high to low transition.
V
SENSE, to monitor an unregulated power supply, the
CAT1026 and CAT1027 signals an impending power
failure by setting VLOW low.
When RESET I/O is driven to the active state, the 200
msectimerwillbegintotimetheresetinterval. Ifexternal
reset is shorter than 200 ms, Reset outputs will remain
active at least 200 ms.
Watchdog Timer
TheWatchdogTimerprovidesanindependentprotection
formicrocontrollers.Duringasystemfailure,theCAT1027
device will provide a reset signal after a time-out interval
of 1.6 seconds for a lack of activity. CAT1027 is designed
with the Watchdog timer feature on the WDI pin. If WDI
does not toggle within 1.6 second intervals, the reset
conditionwillbegeneratedonresetoutput.Thewatchdog
timer is cleared by any transition on monitored line.
Monitoring Two Voltages
The CAT1026 and CAT1027 feature a second voltage
sensor, VSENSE, which drives the open drain VLOW
output low whenever the input voltage is below 1.25V.
The auxiliary voltage monitor timing is shown in Figure
2.
As long as reset signal is asserted, the watchdog timer
will not count and will stay cleared.
By using an external resistor divider the sense circuitry
can be set to monitor a second supply in the system.
The circuit shown in Figure 3 provides an externally
adjustable threshold voltage, VTH_ADJ to monitor the
auxiliary voltage. The low leakage current at VSENSE
allows the use of large value resistors, to reduce the
system power consumption. The VLOW output can be
externally connected to the RESET output to generate
a reset condition when either of the supplies is invalid.
In other applications, VLOW signal can be used to
interrupt the system controller for an impending power
failure notification.
Doc No. 3010, Rev. E
7
CATALYST [ CATALYST SEMICONDUCTOR ]
