®
®
ADS -CCD1 2 0 1
+25°C
TYP.
0 to +70°C
–55 to +125°C
TYP.
ANALOG OUTPUT
MIN.
MAX.
MIN.
TYP.
MAX.
MIN.
MAX.
UNITS
Internal Reference
Voltage
Drift
+9.95
—
—
+10.0
±5
—
+10.05
—
1.5
+9.95
—
—
+10.0
±5
—
+10.05
—
1.5
+9.95
—
—
+10.0
±5
—
+10.05
—
1.5
Volts
ppm/ºC
mA
External Current
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
LogicLoading“1"
Logic Loading "0"
Delay, Falling Edge of EOC
to Output DataValid
+2.4
—
—
—
—
—
—
—
+0.4
–4
+2.4
—
—
—
—
—
—
—
+0.4
–4
+2.4
—
—
—
—
—
—
—
+0.4
–4
Volts
Volts
mA
—
+4
—
+4
—
+4
mA
—
—
35
—
—
35
—
—
35
ns
Output Coding
Straight Binary
POWER REQUIREMENTS, ±15V
Power Supply Range
+15V Supply
–15V Supply
+14.5
–14.5
+4.75
+15.0
–15.0
+5.0
+15.5
–15.5
+5.25
+14.5
–14.5
+4.75
+15.0
–15.0
+5.0
+15.5
–15.5
+5.25
+14.5
–14.5
+4.75
+15.0
–15.0
+5.0
+15.5
–15.5
+5.25
Volts
Volts
Volts
+5V Supply
Power Supply Current
+15V Supply
–15V Supply
+5V Supply
PowerDissipation
Power Supply Rejection
—
—
—
—
—
+50
–40
+70
1.7
—
+65
–50
+85
1.9
±0.01
—
—
—
—
—
+50
–40
+70
1.7
—
+65
–50
+85
1.9
±0.01
—
—
—
—
—
+50
–40
+70
1.7
—
+65
–50
+85
1.9
±0.01
mA
mA
mA
Watts
%FSR/%V
POWER REQUIREMENTS, ±12V
Power Supply Range
+12V Supply
–12V Supply
+11.5
–11.5
+4.75
+12.0
–12.0
+5.0
+12.5
–12.5
+5.25
+11.5
–11.5
+4.75
+12.0
–12.0
+5.0
+12.5
–12.5
+5.25
+11.5
–11.5
+4.75
+12.0
–12.0
+5.0
+12.5
–12.5
+5.25
Volts
Volts
Volts
+5V Supply
Power Supply Current
+12V Supply
–12V Supply
+5V Supply
PowerDissipation
Power Supply Rejection
—
—
—
—
—
+50
–40
+70
1.4
—
+65
–48
+80
1.6
±0.01
—
—
—
—
—
+50
–40
+70
1.4
—
+65
–48
+80
1.6
±0.01
—
—
—
—
—
+50
–40
+70
1.4
—
+65
–48
+80
1.6
±0.01
mA
mA
mA
Watts
%FSR/%V
Footnotes:
➃ Effective bits is equal to:
➀ All power supplies must be on before applying a start convert pulse. All
supplies and the clock (START CONVERT) must be present during warmup
periods. The device must be continuously converting during this time. There is
a slight degradation in performance when using ±12V supplies.
Full Scale Amplitude
Actual Input Amplitude
(SNR + Distortion) – 1.76 + 20 log
6.02
➁ Contact DATEL for availability of other input voltage ranges.
➂ A 100ns wide start convert pulse is used for all production testing.
➄ This is the time required before the A/D output data is valid after
the analog input is back within the specified range.
TECHNICAL NOTES
3. When operating the ADS-CCD1201 from ±12V supplies, do not
drive external circuitry with the REFERENCE OUTPUT (pin 21).
The reference’s accuracy and drift specifications may not be
met, and loading the circuit may cause accuracy errors within
the converter.
1. Obtaining fully specified performance from the ADS-CCD1201
requires careful attention to pc-card layout and power supply
decoupling. The device’s analog and digital ground systems are
connected to each other internally. For optimal performance, tie
all ground pins (14, 19, and 23) directly to a large analog
ground plane beneath the package.
4. A passive bandpass filter is used at the input of the A/D for all
production testing.
Bypass all power supplies, as well as the REFERENCE
OUTPUT (pin 21), to ground with 4.7µF tantalum capacitors in
parallel with 0.1µF ceramic capacitors. Locate the bypass
capacitors as close to the unit as possible. If the user-installed
offset and gain adjusting circuit shown in Figure 2 is used, also
locate it as close to the ADS-CCD1201 as possible.
5. Applying a start pulse while a conversion is in progress (EOC =
logic "1") initiates a new and inaccurate conversion cycle. Data
for the interrupted and subsequent conversions will be invalid.
Table 1. Zero and Gain Adjust
2. ADS-CCD1201 achieves its specified accuracies without
external calibration. If required, the device’s small initial offset
and gain errors can be reduced to zero using the input circuit of
Figure 2. When using this circuit, or any similar offset and gain-
calibration hardware, make adjustments following warmup. To
avoid interaction, always adjust offset before gain.
InputVoltage
Range
Zero Adjust
+1/2 LSB
Gain Adjust
+FS – 1 1/2 LSB
0 to +10V
+1.2207mV
+9.99634V
3.
CANDD [ C&D TECHNOLOGIES ]
