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BH62UV1601_08 参数 Datasheet PDF下载

BH62UV1601_08图片预览
型号: BH62UV1601_08
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗/高速CMOS SRAM [Ultra Low Power/High Speed CMOS SRAM]
分类和应用: 静态存储器
文件页数/大小: 9 页 / 217 K
品牌: BSI [ BRILLIANCE SEMICONDUCTOR ]
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BH62UV1601  
„ PIN DESCRIPTIONS  
Name  
Function  
These 21 address inputs select one of the 2,048K x 8 bit in the RAM  
A0-A20 Address Input  
CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active when  
data read from or write to the device. If either chip enable is not active, the device is  
deselected and is in standby power mode. The DQ pins will be in the high impedance  
state when the device is deselected.  
CE1 Chip Enable 1 Input  
CE2 Chip Enable 2 Input  
The write enable input is active LOW and controls read and write operations. With the  
chip selected, when WE is HIGH and OE is LOW, output data will be present on the  
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the  
selected memory location.  
The output enable input is active LOW. If the output enable is active while the chip is  
selected and the write enable is inactive, data will be present on the DQ pins and they  
will be enabled. The DQ pins will be in the high impendence state when OE is inactive.  
8 bi-directional ports are used to read data from or write data into the RAM.  
WE Write Enable Input  
OE Output Enable Input  
DQ0-DQ7 Data Input/Output  
Ports  
VCC  
Power Supply  
Ground  
VSS  
„ TRUTH TABLE  
MODE  
CE2  
X
I/O OPERATION  
VCC CURRENT  
CE1  
WE  
X
OE  
X
H
X
L
L
L
Chip De-selected  
(Power Down)  
High Z  
ICCSB, ICCSB1  
L
X
X
Output Disabled  
Read  
H
H
H
H
H
High Z  
DOUT  
DIN  
ICC  
ICC  
ICC  
H
L
Write  
L
X
NOTES: H means VIH; L means VIL; X means don’t care (Must be VIH or VIL state)  
„ ABSOLUTE MAXIMUM RATINGS (1)  
„ OPERATING RANGE  
AMBIENT  
TEMPERATURE  
SYMBOL  
VTERM  
TBIAS  
PARAMETER  
RATING  
-0.5(2) to 4.6V  
-40 to +125  
-60 to +150  
1.0  
UNITS  
V
RANG  
VCC  
Terminal Voltage with  
Industrial  
-40OC to + 85OC  
1.65V ~ 3.6V  
Respect to GND  
Temperature Under  
Bias  
OC  
„ CAPACITANCE (1) (TA = 25OC, f = 1.0MHz)  
TSTG  
Storage Temperature  
Power Dissipation  
DC Output Current  
OC  
PT  
W
SYMBOL PAMAMETER CONDITIONS MAX. UNITS  
IOUT  
20  
mA  
Input  
CIN  
CIO  
VIN = 0V  
VI/O = 0V  
10  
15  
pF  
pF  
Capacitance  
Input/Output  
1. Stresses greater than those listed under ABSOLUTE  
MAXIMUM RATINGS may cause permanent damage to the  
device. This is a stress rating only and functional operation of  
the device at these or any other conditions above those  
indicated in the operational sections of this specification is not  
implied. Exposure to absolute maximum rating conditions for  
extended periods may affect reliability.  
Capacitance  
1. This parameter is guaranteed and not 100% tested.  
2. –2.0V in case of AC pulse width less than 30 ns  
Revision  
Oct.,  
1.2  
2008  
R0201-BH62UV1601  
2