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BH62UV8000DI 参数 Datasheet PDF下载

BH62UV8000DI图片预览
型号: BH62UV8000DI
PDF下载: 下载PDF文件 查看货源
内容描述: 超低功耗/高速CMOS SRAM [Ultra Low Power/High Speed CMOS SRAM]
分类和应用: 静态存储器
文件页数/大小: 9 页 / 127 K
品牌: BSI [ BRILLIANCE SEMICONDUCTOR ]
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BSI  
BH62UV8000  
n PIN DESCRIPTIONS  
Name  
Function  
These 20 address inputs select one of the 1,048,576 x 8 bit in the RAM  
A0-A19 Address Input  
CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active when  
data read from or write to the device. If either chip enable is not active, the device is  
deselected and is in standby power mode. The DQ pins will be in the high impedance  
state when the device is deselected.  
CE1 Chip Enable 1 Input  
CE2 Chip Enable 2 Input  
The write enable input is active LOW and controls read and write operations. With the  
chip selected, when WE is HIGH and OE is LOW, output data will be present on the  
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the  
selected memory location.  
WE Write Enable Input  
OE Output Enable Input  
The output enable input is active LOW. If the output enable is active while the chip is  
selected and the write enable is inactive, data will be present on the DQ pins and they  
will be enabled. The DQ pins will be in the high impendence state when OE is inactive.  
8 bi-directional ports are used to read data from or write data into the RAM.  
DQ0-DQ7 Data Input/Output  
Ports  
VCC  
Power Supply  
Ground  
VSS  
n TRUTH TABLE  
MODE  
CE2  
I/O OPERATION  
VCC CURRENT  
CE1  
WE  
X
OE  
X
H
X
L
L
L
X
L
Chip De-selected  
(Power Down)  
High Z  
ICCSB, ICCSB1  
X
X
Output Disabled  
Read  
H
H
H
H
H
High Z  
DOUT  
DIN  
ICC  
ICC  
ICC  
H
L
Write  
L
X
NOTES: H means VIH; L means VIL; X means dont care (Must be VIH or VIL state)  
n ABSOLUTE MAXIMUM RATINGS (1)  
n OPERATING RANGE  
AMBIENT  
TEMPERATURE  
0OC to + 70OC  
SYMBOL  
VTERM  
PARAMETER  
RATING  
-0.5(2) to 4.6V  
-40 to +125  
UNITS  
RANG  
VCC  
Terminal Voltage with  
Respect to GND  
Temperature Under  
Bias  
V
Commercial  
Industrial  
1.65V ~ 3.6V  
1.65V ~ 3.6V  
TBIAS  
OC  
-25OC to + 85OC  
TSTG  
PT  
Storage Temperature  
Power Dissipation  
DC Output Current  
-60 to +150  
OC  
W
1.0  
20  
n CAPACITANCE (1) (TA = 25OC, f = 1.0MHz)  
IOUT  
mA  
1. Stresses greater than those listed under ABSOLUTE MAXIMUM  
RATINGS may cause permanent damage to the device. This is a  
stress rating only and functional operation of the device at these  
or any other conditions above those indicated in the operational  
sections of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
reliability.  
SYMBOL PAMAMETER CONDITIONS MAX. UNITS  
Input  
CIN  
CIO  
VIN = 0V  
VI/O = 0V  
6
8
pF  
pF  
Capacitance  
Input/Output  
Capacitance  
1. This parameter is guaranteed and not 100% tested.  
2. 2.0V in case of AC pulse width less than 30 ns  
R0201-BH62UV8000  
Revision 1.0  
2
Jul.  
2005