PIN CONFIGURATION
Top View
48 47 46 45 44 43 42 41 40 39 38 37
36 +VA
+VA
AGND
DB15
DB14
DB13
DB12
DB11
DB10
DB9
1
2
3
4
5
6
7
8
9
35 AGND
34 REFIN
33 REFOUT
32 RESET
31 A0
ADS7864
30 A1
29 A2
28 BYTE
27 HOLDA
26 HOLDB
25 HOLDC
DB8 10
DB7 11
DB6 12
13 14 15 16 17 18 19 20 21 22 23 24
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
PIN
NAME
DESCRIPTION
1
2
3
+VA
Analog Power Supply. Normally +5V.
Analog Ground
25
26
27
28
29
HOLDC
HOLDB
HOLDA
BYTE
A2
Places Channels C0 and C1 in hold mode.
Places Channels B0 and B1 in hold mode.
Places Channels A0 and A1 in hold mode.
2 x 8 Output Capability. Active HIGH
AGND
DB15
Data Valid Output: “1” for data valid; “0” for invalid
data.
4
5
6
DB14
DB13
DB12
Channel Address Output Pin (see channel truth
table)
A2 Address/Mode Select Pin (see Address/Mode Truth
table).
Channel Address Output Pin (see channel truth
table)
30
31
A1
A0
A1 Address/Mode Select Pin (see Address/Mode Truth
Table).
Channel Address Output Pin (see channel truth
table)
A0 Address/Mode Select Pin (see Address/Mode Truth
Table).
7
DB11
DB10
DB9
Data Bit 11 - MSB
Data Bit 10
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
RESET
REFOUT
REFIN
Reset Pin
8
Reference Out
9
Data Bit 9
Reference In
10
11
12
13
14
15
16
17
18
19
20
21
22
DB8
Data Bit 8
AGND
Analog Ground
DB7
Data Bit 7
+VA
Analog Power Supply. Normally +5V.
Noninverting Input Channel A1
Inverting Input Channel A1
Noninverting Input Channel B1
Inverting Input Channel B1
Noninverting Input Channel C1
Inverting Input Channel C1
Inverting Input Channel C0
Noninverting Input Channel C0
Inverting Input Channel B0
Noninverting Input Channel B0
Inverting Input Channel A0
Noninverting Input Channel A0
DB6
Data Bit 6
CH A1+
CH A1–
CH B1+
CH B1–
CH C1+
CH C1–
CH C0–
CH C0+
CH B0–
CH B0+
CH A0–
CH A0+
DB5
Data Bit 5
DB4
Data Bit 4
DB3
Data Bit 3
DB2
Data Bit 2
DB1
Data Bit 1
DB0
Data Bit 0 - LSB
Low when a conversion is in progress.
Digital Ground
Digital Power Supply, +5VDC
BUSY
DGND
+VD
CLOCK
An external clock must be applied to the CLOCK
input.
23
24
RD
RD Input. Enables the parallel output when used in
conjunction with chip select.
CS
Chip Select
®
ADS7864
4