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ADS7861 参数 Datasheet PDF下载

ADS7861图片预览
型号: ADS7861
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道, 500kHz的, 12位,2个2通道,同步采样模拟数字转换器 [Dual, 500kHz, 12-Bit, 2 2 Channel, Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTER]
分类和应用: 转换器
文件页数/大小: 15 页 / 228 K
品牌: BB [ BURR-BROWN CORPORATION ]
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SPECIFICATIONS  
All specifications TMIN to TMAX, +VA + VD = +5V, and VREF = internal +2.5V, fCLK = 8MHz, fSAMPLE = 500kHz, unless otherwise noted.  
ADS7861E  
TYP  
ADS7861EB  
TYP  
PARAMETER  
RESOLUTION  
CONDITIONS  
MIN  
MAX  
MIN  
MAX  
UNITS  
12  
Bits  
ANALOG INPUT  
Input Voltage Range-Bipolar  
Input Capacitance  
Input Leakage Current  
VCENTER = Internal VREF at 2.5V  
–VREF  
+VREF  
V
pF  
µA  
15  
±1  
SYSTEM PERFORMANCE  
No Missing Codes  
Integral Linearity  
Integral Linearity Match  
Differential Linearity  
Bipolar Offset Error  
Bipolar Offset Error Match  
Positive Gain Error  
Positive Gain Error Match  
Negative Gain Error  
Negative Gain Error Match  
Common-Mode Rejection Ratio  
12  
Bits  
LSB  
LSB  
LSB  
LSB  
LSB  
% of FSR  
LSB  
% of FSR  
LSB  
±0.75  
0.5  
±1  
±2  
±1  
±0.5  
±0.5  
±1  
±1  
2
±0.50  
1
±0.50  
1
Referenced to REFIN  
Referenced to REFIN  
Referenced to REFIN  
±0.5  
±3  
3
±0.75  
2
±0.75  
2
±0.15  
±0.15  
±0.10  
±0.10  
At DC  
80  
80  
120  
0.5  
dB  
dB  
µVrms  
LSB  
VIN = ±1.25Vp-p at 50kHz  
Noise  
Power Supply Rejection Ratio  
2
SAMPLING DYNAMICS  
Conversion Time per A/D  
Acquisition Time  
1.625  
0.375  
µs  
µs  
Throughput Rate  
Aperture Delay  
Aperture Delay Matching  
Aperture Jitter  
Small-Signal Bandwidth  
500  
kHz  
ns  
ps  
ps  
MHz  
3.5  
100  
50  
40  
DYNAMIC CHARACTERISTICS  
Total Harmonic Distortion  
SINAD  
Spurious Free Dynamic Range  
Channel-to-Channel Isolation  
VIN = ±2.5Vp-p at 100kHz  
VIN = ±2.5Vp-p at 100kHz  
VIN = ±2.5Vp-p at 100kHz  
VIN = ±2.5Vp-p at 100kHz  
–72  
–76  
dB  
dB  
dB  
dB  
70  
72  
76  
–80  
VOLTAGE REFERENCE  
Internal  
Internal Drift  
2.475  
2.5  
±25  
50  
2.525  
V
ppm/°C  
µVp-p  
mA  
mV/µA  
dB  
V
µA  
pF  
Internal Noise  
Internal Source Current  
Internal Load Rejection  
Internal PSRR  
External Voltage Range  
Input Current  
2
0.005  
80  
2.5  
0.05  
5
1.2  
2.6  
1
Input Capacitance  
DIGITAL INPUT/OUTPUT  
Logic Family  
CMOS  
Logic Levels: VIH  
IIH = +5µA  
IIL = +5µA  
IOH = 2 CMOS Loads  
IOL = 2 CMOS Loads  
3.0  
–0.3  
3.5  
+VDD + 0.3  
1
V
V
V
V
MHz  
VIL  
VOH  
VOL  
0.4  
8
External Clock, Optional  
Data Format  
0.2  
Binary Two’s Complement  
POWER SUPPLY REQUIREMENTS  
Power Supply Voltage, +V  
Quiescent Current, +VA  
4.75  
5
5
25  
5.25  
8
40  
V
mA  
mW  
Power Dissipation  
Specifications same as ADS7861E.  
Theinformationprovidedhereinisbelievedtobereliable;however,BURR-BROWNassumesnoresponsibilityforinaccuraciesoromissions.BURR-BROWNassumes  
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change  
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant  
any BURR-BROWN product for use in life support devices and/or systems.  
®
ADS7861  
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