PIN CONFIGURATION
PIN DESCRIPTION
PIN
NAME
DESCRIPTION
Top View
SSOP
1
2
3
+VCC
UL
Power Supply, 2.0V to 5V.
Upper Left Panel Driver (VCC ON/OFF)
UR
Upper Right Panel Driver (switch between VCC
and GND)
+VCC
UL
1
2
3
4
5
6
7
8
16 DCLK
15 CS
4
LL
Lower Left Panel Driver (switch between GND
and VCC
)
5
6
LR
GND
Lower Right Panel Driver (GND ON/OFF)
Ground
UR
14 DIN
LL
13 BUSY
12 DOUT
11 PENIRQ
10 +VCC
7
WIPER
AUXIN
VREF
Panel Input
ADS7845
8
Auxiliary Input
LR
9
Voltage Reference Input
Power Supply, 2.0V to 5V.
GND
WIPER
AUXIN
10
11
+VCC
PENIRQ
Pen Interrupt. Open anode output (requires 10kΩ
to 100kΩ pull-up resistor externally).
12
DOUT
Serial Data Output. Data is shifted on the falling
edge of DCLK. This output is high impedance
when CS is HIGH.
9
VREF
13
14
15
16
BUSY
DIN
Busy Output. This output is high impedance when
CS is HIGH.
Serial Data Input. If CS is LOW, data is latched on
rising edge of DCLK.
ABSOLUTE MAXIMUM RATINGS(1)
CS
Chip Select Input. Controls conversion timing and
enables the serial input/output register.
External Clock Input. This clock runs the SAR con-
version process and synchronizes serial data I/O.
+VCC to GND ........................................................................ –0.3V to +6V
Analog Inputs to GND ............................................ –0.3V to +VCC + 0.3V
Digital Inputs to GND ............................................. –0.3V to +VCC + 0.3V
Power Dissipation .......................................................................... 250mW
Maximum Junction Temperature ................................................... +150°C
Operating Temperature Range ........................................–40°C to +85°C
Storage Temperature Range ......................................... –65°C to +150°C
Lead Temperature (soldering, 10s)............................................... +300°C
DCLK
ELECTROSTATIC
DISCHARGE SENSITIVITY
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published specifi-
cations.
PACKAGE/ORDERING INFORMATION
MAXIMUM
INTEGRAL
LINEARITY
PACKAGE
DRAWING
NUMBER(1)
SPECIFICATION
TEMPERATURE
RANGE
ORDERING
NUMBER(2)
TRANSPORT
MEDIA
PRODUCT
ERROR (LSB)
PACKAGE
ADS7845E
±2
16-Lead SSOP
322
–40°C to +85°C
ADS7845E
Rails
"
"
"
"
"
ADS7845E/2K5
Tape and Reel
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are
available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “ADS7845E/2K5” will get a single
2500-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.
®
ADS7845
3
BB [ BURR-BROWN CORPORATION ]
