PIN DESCRIPTIONS
PIN CONFIGURATION
Top View
PIN
NAME
DESCRIPTION
1
2
3
4
5
6
7
8
9
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
Analog Input Channel 0.
Analog Input Channel 1.
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
1
2
3
4
5
6
7
8
9
20 +VCC
19 DCLK
18 CS
Analog Input Channel 2.
Analog Input Channel 3.
Analog Input Channel 4.
Analog Input Channel 5.
Analog Input Channel 6.
17 DIN
Analog Input Channel 7.
Ground reference for analog inputs. Sets zero code
voltage in single ended mode. Connect this pin to ground
or ground reference point.
16 BUSY
15 DOUT
14 GND
13 GND
12 +VCC
11 VREF
ADS7844
10
11
SHDN
VREF
Shutdown. When LOW, the device enters a very low
power shutdown mode.
Voltage Reference Input. See Specification Table for
ranges.
12
13
14
15
+VCC
GND
GND
DOUT
Power Supply, 2.7V to 5V.
Ground
SHDN 10
Ground
Serial Data Output. Data is shifted on the falling edge of
DCLK. This output is high impedance when
CS is high.
16
BUSY
Busy Output. Busy goes low when the DIN control bits
are being read and also when the device is converting.
The Output is high impedance when CS is High.
ABSOLUTE MAXIMUM RATINGS(1)
17
18
DIN
CS
Serial Data Input. If CS is LOW, data is latched on rising
+VCC to GND ........................................................................ –0.3V to +6V
Analog Inputs to GND ............................................ –0.3V to +VCC + 0.3V
Digital Inputs to GND ........................................................... –0.3V to +6V
Power Dissipation .......................................................................... 250mW
Maximum Junction Temperature ................................................... +150°C
Operating Temperature Range ........................................ –40°C to +85°C
Storage Temperature Range ......................................... –65°C to +150°C
Lead Temperature (soldering, 10s)............................................... +300°C
edge of DCLK
.
Chip Select Input. Active LOW. Data will not be clocked
into DIN unless CS is low. When CS is high DOUT is high
impedance.
19
20
CLK
External Clock Input. The clock speed determines the
conversion rate by the equation fCLK = 16 • fSAMPLE
.
+VCC
Power Supply
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published specifi-
cations.
PACKAGE/ORDERING INFORMATION
MINIMUM
RELATIVE
ACCURACY
(LSB)
MAXIMUM
GAIN ERROR
(LSB)
SPECIFICATION
TEMPERATURE
RANGE
PACKAGE
DRAWING
NUMBER(1)
ORDERING
NUMBER(2)
TRANSPORT
MEDIA
PRODUCT
PACKAGE
ADS7844E
±2
"
"
"
±1
"
±4
"
"
"
±3
"
–40°C to +85°C
20-Lead QSOP
349
"
334
"
349
"
334
"
ADS7844E
ADS7844E/2K5
ADS7844N
ADS7844N/1K
ADS7844EB
ADS7844EB/2K5
ADS7844NB
ADS7844NB/1K
Rails
Tape and Reel
Rails
Tape and Reel
Rails
Tape and Reel
Rails
Tape and Reel
"
"
"
"
"
ADS7844N
20-Lead SSOP
"
"
ADS7844EB
–40°C to +85°C
20-Lead QSOP
"
"
"
"
"
ADS7844NB
"
"
"
"
"
20-Lead SSOP
"
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are
available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “ADS7844/2K5” will get a single
2500-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.
®
ADS7844
4
BB [ BURR-BROWN CORPORATION ]
