SPECIFICATIONS
At –40°C to +85°C, +VCC = +5V, VREF = +5V, fSAMPLE = 200kHz, fCLK = 16 • fSAMPLE, unless otherwise specified.
ADS7816
TYP
ADS7816B
TYP
ADS7816C
TYP
PARAMETER
CONDITIONS
MIN
MAX
MIN
MAX
MIN
MAX
UNITS
ANALOG INPUT
Full-Scale Input Span
Absolute Input Voltage
+In – (–In)
+In
0
–0.2
–0.2
VREF
VCC +0.2
+0.2
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
V
V
V
–In
Capacitance
Leakage Current
25
±1
✻
✻
✻
✻
pF
µA
SYSTEM PERFORMANCE
Resolution
No Missing Codes
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Noise
Power Supply Rejection
12
✻
✻
Bits
Bits
11
12
✻
±0.5
±0.5
±2
±2
±4
±4
±0.5
±0.5
±2
±1
✻
±0.5
±0.25
±1
±0.75
✻
LSB(1)
LSB
LSB
LSB
µVrms
dB
✻
✻
33
82
✻
✻
✻
✻
SAMPLING DYNAMICS
Conversion Time
Acquisition Time
12
✻
✻
✻
✻
Clk Cycles
Clk Cycles
kHz
1.5
✻
✻
Throughput Rate
200
DYNAMIC CHARACTERISTICS
Total Harmonic Distortion
VIN = 5.0Vp-p at 1kHz
–84
–82
72
✻
✻
✻
✻
✻
✻
✻
✻
dB
dB
dB
dB
V
V
V
IN = 5.0Vp-p at 5kHz
IN = 5.0Vp-p at 1kHz
IN = 5.0Vp-p at 1kHz
SINAD
Spurious Free Dynamic Range
86
REFERENCE INPUT
Voltage Range
Resistance
0.1
5
✻
✻
✻
✻
V
CS = GND, fSAMPLE = 0Hz
CS = VCC
5
5
38
2.4
0.001
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
GΩ
GΩ
µA
µA
µA
Current Drain
At Code 710h
fSAMPLE = 12.5kHz
CS = VCC
100
20
3
✻
✻
✻
✻
✻
✻
DIGITAL INPUT/OUTPUT
Logic Family
Logic Levels:
VIH
VIL
VOH
CMOS
✻
✻
IIH = +5µA
IIL = +5µA
IOH = –250µA
IOL = 250µA
3
–0.3
3.5
+VCC +0.
0.8
3
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
V
V
V
V
VOL
0.4
✻
✻
Data Format
Straight Binary
✻
✻
POWER SUPPLY REQUIREMENTS
VCC
Specified Performance
4.50
5.25
700
✻
✻
✻
✻
✻
✻
V
Quiescent Current
380
30
280
✻
✻
✻
✻
✻
✻
µA
µA
µA
µA
fSAMPLE = 12.5kHz(2, 3)
fSAMPLE = 12.5kHz(3)
CS = VCC, fSAMPLE = 0Hz
400
3
Power Down
✻
✻
✻
✻
TEMPERATURE RANGE
Specified Performance
–40
+85
✻
✻
°C
✻ Specifications same as grade to the left.
NOTE: (1) LSB means Least Significant Bit, with VREF equal to +5V, one LSB is 1.22mV. (2) fCLK = 3.2MHz, CS = VCC for 251 clock cycles out of every 256. (3) See
the Power Dissipation section for more information regarding lower sample rates.
®
ADS7816
2