ELECTRICAL CHARACTERISTICS (Cont.)
At TA = –40°C to +85°C, fS = 40kHz, VDIG = VANA = +5V, and using internal reference and fixed resistors (see Figure 7b), unless otherwise specified.
ADS7807P, U
TYP
ADS7807PB, UB
TYP
PARAMETER
CONDITIONS
MIN
MAX
MIN
MAX
UNITS
AC ACCURACY
Spurious-Free Dynamic Range
Total Harmonic Distortion
Signal-to-(Noise + Distortion)
f
IN = 1kHz, ±10V
90
83
83
100
–100
88
30
88
96
86
86
ꢀ
ꢀ
ꢀ
32
ꢀ
ꢀ
ꢀ
dB(6)
dB
dB
dB
dB
fIN = 1kHz, ±10V
–90
–96
fIN = 1kHz, ±10V
–60dB Input
Signal-to-Noise
Usable Bandwidth(7)
Full-Power Bandwidth (–3dB)
fIN = 1kHz, ±10V
130
600
kHz
kHz
SAMPLING DYNAMICS
Aperture Delay
Aperture Jitter
Transient Response
Over-Voltage Recovery(8)
40
20
ꢀ
ꢀ
ns
ps
µs
ns
FS Step
No Load
5
ꢀ
ꢀ
750
ꢀ
REFERENCE
Internal Reference Voltage
Internal Reference Source Current
(Must use external buffer.)
Internal Reference Drift
External Reference Voltage Range
for Specified Linearity
2.48
2.3
2.5
1
2.52
ꢀ
ꢀ
ꢀ
ꢀ
V
µA
8
2.5
ꢀ
ꢀ
ppm/°C
V
2.7
ꢀ
ꢀ
External Reference Current Drain
External 2.5000V Ref
100
µA
DIGITAL INPUTS
Logic Levels
VIL
VIH
IIL
–0.3
+2.0
+0.8
VD + 0.3V
±10
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
V
V
µA
µA
(9)
VIL = 0V
VIH = 5V
IIH
±10
DIGITAL OUTPUTS
Data Format
Data Coding
VOL
Parallel 16 bits in 2-bytes; Serial
Binary Two’s Complement or Straight Binary
ISINK = 1.6mA
ISOURCE = 500µA
High-Z State,
+0.4
ꢀ
ꢀ
ꢀ
V
V
µA
VOH
+4
ꢀ
Leakage Current
±5
VOUT = 0V to VDIG
Output Capacitance
High-Z State
15
pF
DIGITAL TIMING
Bus Access Time
Bus Relinquish Time
RL = 3.3kΩ, CL = 50pF
RL = 3.3kΩ, CL = 10pF
83
83
ꢀ
ꢀ
ns
ns
POWER SUPPLIES
Specified Performance
VDIG
VANA
IDIG
IANA
Must be ≤ VANA
+4.75
+4.75
+5
+5
0.6
5.0
28
23
50
+5.25
+5.25
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
V
V
mA
mA
mW
mW
µW
Power Dissipation
VANA = VDIG = 5V, fS = 40kHz
REFD HIGH
PWRD and REFD HIGH
35
ꢀ
TEMPERATURE RANGE
Specified Performance
Derated Performance
Storage
–40
–55
–65
+85
+125
+150
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
°C
°C
°C
Thermal Resistance (θJA
)
DIP
SO
75
75
ꢀ
ꢀ
°C/W
°C/W
ꢀ Same specifications as ADS7807P, U.
NOTES: (1) LSB means Least Significant Bit. One LSB for the ±10V input range is 305µV. (2) Typical rms noise at worst-case transition. (3) As measured with
fixed resistors, see Figure 7b. Adjustable to zero with external potentiometer. (4) Full-scale error is the worst case of –Full-Scale or +Full-Scale untrimmed deviation
from ideal first and last code transitions, divided by the transition voltage (not divided by the full-scale range) and includes the effect of offset error. (5) This is the
time delay after the ADS7807 is brought out of Power-Down mode until all internal settling occurs and the analog input is acquired to rated accuracy. A Convert
command after this delay will yield accurate results. (6) All specifications in dB are referred to a full-scale input. (7) Usable bandwidth defined as full-scale input
frequency at which Signal-to-(Noise + Distortion) degrades to 60dB. (8) Recovers to specified performance after 2 • FS input overvoltage. (9) The minimum VIH
level for the DATACLK signal is 3V.
ADS7807
SBAS022C
3
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BB [ BURR-BROWN CORPORATION ]
