CONNECTION DIAGRAM
+5VDC Supply
Power-Up Reset
1
28
27
Status
(VDD
)
–
12/8
2
3
4
5
6
DB11 (MSB)
Control
Logic
CS
AO
26 DB10
Clock
25
24
DB9
DB8
–
R/C
CE
23
DB7
22 DB6
21 DB5
NC*
7
8
12
Bits
2.5V Ref
Out
2.5V
Reference
12 Bits
Analog
Common
20
19 DB3
18
9
DB4
2.5V Ref
In
10
11
DB2
VEE (Mode Control)
17 DB1
Bipolar 12
Offset
–
+
10V Range 13
16 DB0 (LSB)
CDAC
20V Range
14
15 Digital
Common
*Not Internally Connected
PACKAGE INFORMATION(1)
ABSOLUTE MAXIMUM RATINGS
PACKAGE DRAWING
NUMBER
VEE to Digital Common ....................................................... +VDD to –16.5V
DD to Digital Common ............................................................... 0V to +7V
MODEL
PACKAGE
V
ADS574JE
ADS574KE
ADS574JP
ADS574KP
ADS574JU
ADS574KU
ADS574SF
ADS574TF
ADS574SH
ADS574TH
ADS574JH
ADS574KH
0.3" Plastic DIP
0.3" Plastic DIP
0.6" Plastic DIP
0.6" Plastic DIP
SOIC
246
246
215
215
217
217
247
247
149
149
149
149
Analog Common to Digital Common .................................................... ±1V
Control Inputs (CE, CS, AO, 12/8, R/C)
to Digital Common ................................................... –0.5V to VDD +0.5V
Analog Inputs (Ref In, Bipolar Offset, 10VIN
)
to Analog Common ...................................................................... ±16.5V
20VIN to Analog Common ................................................................... ±24V
Ref Out.......................................................... Indefinite Short to Common,
Momentary Short to VDD
Max Junction Temperature ............................................................ +165°C
Power Dissipation ........................................................................ 1000mW
Lead Temperature (soldering,10s) ................................................. +300°C
Thermal Resistance, θJA : Ceramic DIPs ........................................ 50°C/W
Plastic DIPs ........................................ 100°C/W
SOIC
0.3" Ceramic DIP
0.3" Ceramic DIP
0.6" Ceramic DIP
0.6" Ceramic DIP
0.6" Ceramic DIP
0.6" Ceramic DIP
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
SOIC ................................................... 100°C/W
ORDERING INFORMATION
TEMPERATURE
RANGE
LINEARITY
ERROR
MODEL
PACKAGE
SINAD(1)
ADS574JE
ADS574KE
ADS574JP
ADS574KP
ADS574JU
ADS574KU
ADS574SF
ADS574TF
ADS574SH
ADS574TH
ADS574JH
ADS574KH
0.3" Plastic DIP
0.3" Plastic DIP
0.6" Plastic DIP
0.6" Plastic DIP
SOIC
68
70
68
70
68
70
68
70
68
70
68
70
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
±1LSB
±1/2LSB
±1LSB
±1/2LSB
±1LSB
±1/2LSB
±1LSB
±1/2LSB
±1LSB
SOIC
0°C to +70°C
0.3" Ceramic DIP
0.3" Ceramic DIP
0.6" Ceramic DIP
0.6" Ceramic DIP
0.6" Ceramic DIP
0.6" Ceramic DIP
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
0°C to +70°C
±1/2LSB
±1LSB
±1/2LSB
0°C to +70°C
NOTE: (1) SINAD is Signal to (Noise and Distortion) expressed in dB.
®
5
ADS574
BB [ BURR-BROWN CORPORATION ]
