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ADS2806 参数 Datasheet PDF下载

ADS2806图片预览
型号: ADS2806
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道, 12位, 32MHz的采样模拟数字转换器 [Dual, 12-Bit, 32MHz Sampling ANALOG-TO-DIGITAL CONVERTER]
分类和应用: 转换器
文件页数/大小: 19 页 / 376 K
品牌: BURR-BROWN [ BURR-BROWN CORPORATION ]
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ADS2806
ADS
280
6
SBAS178B – DECEMBER 2000 – REVISED MAY 2002
Dual, 12-Bit, 32MHz Sampling
ANALOG-TO-DIGITAL CONVERTER
FEATURES
q
SPURIOUS-FREE DYNAMIC RANGE:
73dB at 10MHz f
IN
q
HIGH SNR: 67dB (2Vp-p), 69dB (3Vp-p)
q
INTERNAL OR EXTERNAL REFERENCE
q
LOW DLE:
±
0.4LSB
q
FLEXIBLE INPUT RANGE: 2Vp-p to 3Vp-p
q
TQFP-64 POWER PACKAGE
APPLICATIONS
q
COMMUNICATIONS IF PROCESSING
q
COMMUNICATIONS BASESTATIONS
q
TEST EQUIPMENT
q
MEDICAL IMAGING
q
VIDEO DIGITIZING
q
CCD DIGITIZING
DESCRIPTION
The ADS2806 is a dual, high-speed, high dynamic range,
12-bit pipelined Analog-to-Digital Converter (ADC). This con-
verter includes a high-bandwidth track-and-hold that gives
excellent spurious performance up to and beyond the Nyquist
rate. The differential nature of this track-and-hold and ADC
circuitry minimizes even-order harmonics and gives excel-
lent common-mode noise immunity. The track-and-hold can
also be operated single-ended.
The ADS2806 provides for setting the full-scale range of the
converter without any external reference circuitry. The internal
+V
S
reference can be disabled allowing low drive, external refer-
ences to be used for improved tracking in multichannel systems.
The ADS2806 provides an over-range indicator flag to
indicate an input signal that exceeds the full-scale input
range of the converter. This flag can be used to reduce the
gain of front end gain control circuitry. There is also an
output enable pin to allow for multiplexing and testability on
a PC board.
The ADS2806 employs digital error correction techniques to
provide excellent differential linearity for demanding imag-
ing applications. The ADS2806 is available in a TQFP-64
power package.
OE
A
OVR
A
ADS2806
V
IN
IN
A
T&H
IN
A
(Opt.)
12-Bit
Pipelined
A/D
Error
Correction
Logic
D12A
D1A
3-State
Outputs
INT/EXT
FS
SEL
Internal
Reference
Timing
Circuitry
CLK
V
IN
IN
B
T&H
IN
B
(Opt.)
CM
12-Bit
Pipelined
A/D
Error
Correction
Logic
3-State
Outputs
D12B
D1B
Optional External
Reference
OE
B
OVR
B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 2000, Texas Instruments Incorporated
www.ti.com