• The reduced signal swing allows for more headroom in
the interface circuitry and, therefore, a wider selection of
the best suitable driver op amp.
APPLICATION INFORMATION
THEORY OF OPERATION
The ADS2806 integrates two high-speed CMOS ADCs and
an internal reference. The ADCs utilize a pipelined converter
architecture consisting of 11 internal stages. Each stage
feeds its data into the digital error correction logic, ensuring
excellent differential linearity and no missing codes at the
12-bit level. The output data becomes valid after the rising
clock edge (see Timing Diagram). The pipeline architecture
results in a data latency of 6 clock cycles.
• Even-order harmonics are minimized.
• Improves the noise immunity based on the converter’s
common-mode input rejection.
Using the single-ended mode, the signal is applied to one of
the inputs, while the other input is biased with a DC voltage
to the required common-mode level. Both inputs are equal
in terms of their impedance and performance, except that
applying the signal to the complementary input (IN) instead
of the IN input will invert the input signal relative to the
output code. For example, in the case when the input driver
operates in inverting mode, using IN as the signal input will
restore the phase of the signal to its original orientation.
Time-domain applications may benefit from a single-ended
interface configuration and its reduced circuit complexity.
Driving the ADS2806 with a single-ended signal will result in
a reduction of the distortion performance, while maintaining
good Signal-to-Noise Ratio (SNR). Employing dual-supply
amplifiers and AC-coupling will usually yield the best re-
sults, while DC-coupling and/or single-supply amplifiers
impose additional design constraints due to their headroom
requirements, especially when selecting the 3Vp-p input
range. However, single-supply amplifiers have the advan-
tage of inherently limiting their output swing to within the
supply rails. Alternatively, a voltage limiting amplifier, like
the OPA688, may be considered to set fixed-signal limits
and avoid any severe over-range condition for the ADC.
The analog input of the ADS2806 consists of a differential
track-and-hold circuit. The differential topology along with
tightly matched poly-poly capacitors produce a high level of
AC performance at high sampling rates and in some under-
sampling applications.
Both inputs (IN, IN) require external biasing using a com-
mon-mode voltage that is typically at the mid-supply level
(+VS/2).
DRIVING THE ANALOG INPUTS
The analog inputs of the ADS2806 are very high impedance
and should be driven through an R-C network designed to
pass the highest frequency of interest. This prevents high-
frequency noise in the input from affecting SFDR and SNR.
The ADS2806 can be used in a wide variety of applications
and deciding on the best performing analog interface circuit
depends on the type of application. The circuit definition
should include considerations of input frequency spectrum
and amplitude, single-ended or differential drive, and avail-
able power supplies. For example, communication (fre-
quency domain) applications process frequency bands not
including DC. In imaging (time domain) applications, the
input DC component must be maintained into the ADC.
Features of the ADS2806 include full-scale select (SEL),
external reference, and CM output, providing flexibility to
accommodate a wide range of applications. The ADS2806
should be configured to meet application objectives, while
observing the headroom requirements of the driving ampli-
fiers, to yield the best overall performance.
The full-scale input range of the ADS2806 is defined by the
reference voltages. For example, setting the range select
pin to SEL = LOW, and using the internal references
(REFT = +3.0V and REFTB = +2.0V), the full-scale range is
defined as: FSR = 2 • (REFT – REFB) = 2Vp-p.
The trade-off of the differential input configuration versus
the single-ended is its higher complexity. In either case, the
selection of the driver amplifier should be such that the
amplifier’s performance will not degrade the ADC’s perfor-
mance. The ADS2806 operates on a single power supply
that requires a level shift for ground-based bipolar input
signals to comply with its input voltage range requirements.
The ADS2806 input structure allows it to be driven either
single-ended or differentially. Differential operation of the
ADS2806 requires an in-phase input signal and a 180° out-
of-phase part simultaneously applied to the inputs (IN, IN).
The differential operation offers a number of advantages
that, in most applications, will be instrumental in achieving
the best dynamic performance of the ADS2806:
The input of the ADS2806 is of a capacitive nature and the
driving source needs to provide the current to charge or
discharge the input sampling capacitor while the track-and-
hold is in track mode. This effectively results in a dynamic
input impedance that depends on the sampling frequency.
In most applications, it is recommended to add a series
resistor, typically 20Ω to 50Ω, between the drive source and
the converter inputs. This will isolate the capacitive input
from the source, which can be crucial to avoid gain peaking
when using wideband operational amplifiers. Secondly, it
• The signal swing is half of that required for the single-
ended operation and, therefore, is less demanding to
achieve while maintaining good linearity performance
from the signal source.
ADS2806
SBAS178B
9
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