ELECTRICAL CHARACTERISTICS (Cont.)
All specifications at TMIN to TMAX, AVDD = +5V, DVDD = +1.8V. CLK = 8MHz, and VREF = 4.096, unless otherwise specified.
ADS1254E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUT/OUTPUT
Logic Family
CMOS
Logic Level: VIH
0.65 • DVDD
–0.3
DVDD –0.4
DVDD + 0.3
0.35 • DVDD
V
V
V
V
V
VIL
VOH
VOL
IOH = –500µA
IOL = 500µA
0.4
Input (SCLK, CLK, CHSEL0, CHSEL1) Hysteresis
Data Format
0.6
Offset Binary Two’s Complement
POWER-SUPPLY REQUIREMENTS
Power Supply Voltage
DVDD
AVDD
AVDD = +5V
DVDD = +1.8V
1.8
4.75
3.6
5.25
1.15
0.4
6.5
1
VDC
VDC
mA
mA
mW
µA
5
Quiescent Current
0.8
0.2
4.3
0.4
Operating Power
Power-Down Current
TEMPERATURE RANGE
Operating
Storage
–40
–60
+85
+100
°C
°C
PIN CONFIGURATION
PIN DESCRIPTIONS
PIN
NAME
PIN DESCRIPTION
Top View
SSOP-20
1
CH1+
Analog Input: Positive Input of the Differen-
tial Analog Input
2
3
4
5
6
CH1–
CH2+
CH2–
CH3+
CH3–
Analog Input: Negative Input of the Differ-
ential Analog Input
Analog Input: Positive Input of the Differen-
tial Analog Input
Analog Input: Negative Input of the Differ-
ential Analog Input
Analog Input: Positive Input of the Differen-
tial Analog Input
CH1+
CH1–
CH2+
CH4+
20
19
18
17
16
15
14
13
12
11
1
2
Analog Input: Negative Input of the Differ-
ential Analog Input
7
8
AVDD
CLK
Input: Analog Power Supply Voltage, +5V
Digital Input: Device System Clock. The
system clock is in the form of a CMOS-
compatible clock. This is a Schmitt-Trigger
input
Input: Digital Power Supply Voltage
No Connection
No Connection
CH4–
VREF
3
9
DVDD
NC
NC
CH2–
CH3+
CH3–
AVDD
4
AGND
10
11
12
13
DGND
DOUT/DRDY
Input: Digital Ground
CHSEL0
CHSEL1
SCLK
5
ADS1254E
Digital Output: Serial Data Output/Data
Ready. This output indicates that a new
output word is available from the ADS1254
data output register. The serial data is
clocked out of the serial data output shift
register using SCLK.
6
7
14
SCLK
Digital Input: Serial Clock. The serial clock
is in the form of a CMOS-compatible clock.
The serial clock operates independently
from the system clock, therefore, it is pos-
sible to run SCLK at a higher frequency
than CLK. The normal state of SCLK is
LOW. Holding SCLK HIGH will either ini-
tiate a modulator reset for synchronizing
multiple converters or enter power-down
mode. This is a Schmitt-Trigger input.
Digital Input: Used to select analog input
channel. This is a Schmitt-Trigger Input
Digital Input: Used to select analog input
channel. This is a Schmitt-Trigger Input
Input: Analog Ground
CLK
DVDD
NC
8
DOUT/DRDY
9
DGND
NC
10
15
16
CHSEL1
CHSEL0
17
18
19
AGND
VREF
CH4–
Analog Input: Reference Voltage Input
Analog Input: Negative Input of the Differ-
ential Analog Input
20
CH4+
Analog Input: Positive Input of the Differen-
tial Analog Input
ADS1254
3
SBAS213
BB [ BURR-BROWN CORPORATION ]
