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SBAS286A − JUNE 2003 − REVISED MARCH 2004
PIN ASSIGNMENTS
PW PACKAGE
TSSOP
(TOP VIEW)
DVDD
SCLK
1
2
3
4
5
6
7
8
9
20 AVDD
19
18
17
VREFP
VREFN
GND
CLK
DRDY/DOUT
MUX0
16 AINN1
15 AINP1
ADS1224
MUX1
14
13
12
TEMPEN
BUFEN
AINP4
AINN2
AINP2
AINN3
AINN4 10
11 AINP3
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
DVDD
1
Digital
Digital power supply
SCLK
2
3
4
Digital input
Digital input
Digital Ouput
Serial clock input
CLK
System clock input
Dual-purpose output:
DRDY/DOUT
Data Ready: indicates valid data by going low.
Data Output: outputs data, MSB first, on the rising edge of SCLK.
Selects analog input of mux, bit 0
Selects analog input of mux, bit 1
Selects temperature sensor input from mux
Enables input buffer
MUX0
MUX1
TEMPEN
BUFEN
AINP4
AINN4
AINP3
AINN3
AINP2
AINN2
AINP1
AINN1
GND
5
Digital input
Digital input
Digital input
Digital input
Analog input
Analog input
Analog input
Analog input
Analog input
Analog input
Analog input
Analog input
Analog/Digital
Analog input
Analog input
Analog
6
7
8
9
Analog channel 4 positive input
Analog channel 4 negative input
Analog channel 3 positive input
Analog channel 3 negative input
Analog channel 2 positive input
Analog channel 2 negative input
Analog channel 1 positive input
Analog channel 1 negative input
Analog and digital ground
10
11
12
13
14
15
16
17
18
19
20
VREFN
VREFP
AVDD
Negative reference input
Positive reference input
Analog power supply
5
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